Optimize X vs. Y usage for indexed increment
This commit is contained in:
parent
23091a0536
commit
347c336b09
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@ -13409,6 +13409,129 @@ bool NativeCodeBasicBlock::CanReplaceXRegWithYReg(int start, int end)
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return true;
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}
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bool NativeCodeBasicBlock::CanGlobalSwapXY(void)
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{
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if (!mVisited)
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{
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mVisited = true;
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for (int i = 0; i < mIns.Size(); i++)
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{
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NativeCodeInstruction& ins(mIns[i]);
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if (ins.mMode == ASMIM_INDIRECT_Y)
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return false;
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if (ins.mMode == ASMIM_INDIRECT_X)
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return false;
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if (ins.mMode == ASMIM_ABSOLUTE_X && (ins.mType != ASMIT_LDY && !HasAsmInstructionMode(ins.mType, ASMIM_ABSOLUTE_Y)))
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return false;
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if (ins.mType == ASMIT_JSR && (ins.mFlags & (NCIF_USE_CPU_REG_X | NCIF_USE_ZP_32_X)))
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return false;
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}
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if (mTrueJump && !mTrueJump->CanGlobalSwapXY())
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return false;
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if (mFalseJump && !mFalseJump->CanGlobalSwapXY())
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return false;
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}
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return true;
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}
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bool NativeCodeBasicBlock::GlobalSwapXY(void)
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{
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bool changed = false;
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if (!mVisited)
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{
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mVisited = true;
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for (int i = 0; i < mIns.Size(); i++)
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{
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NativeCodeInstruction& ins(mIns[i]);
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if (ins.mMode == ASMIM_ABSOLUTE_X)
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{
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ins.mMode = ASMIM_ABSOLUTE_Y;
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changed = true;
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}
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else if (ins.mMode == ASMIM_ABSOLUTE_Y)
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{
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ins.mMode = ASMIM_ABSOLUTE_X;
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changed = true;
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}
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switch (ins.mType)
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{
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case ASMIT_LDX:
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ins.mType = ASMIT_LDY;
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changed = true;
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break;
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case ASMIT_STX:
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ins.mType = ASMIT_STY;
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changed = true;
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break;
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case ASMIT_CPX:
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ins.mType = ASMIT_CPY;
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changed = true;
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break;
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case ASMIT_INX:
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ins.mType = ASMIT_INY;
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changed = true;
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break;
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case ASMIT_DEX:
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ins.mType = ASMIT_DEY;
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changed = true;
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break;
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case ASMIT_TAX:
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ins.mType = ASMIT_TAY;
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changed = true;
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break;
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case ASMIT_TXA:
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ins.mType = ASMIT_TYA;
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changed = true;
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break;
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case ASMIT_LDY:
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ins.mType = ASMIT_LDX;
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changed = true;
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break;
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case ASMIT_STY:
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ins.mType = ASMIT_STX;
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changed = true;
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break;
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case ASMIT_CPY:
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ins.mType = ASMIT_CPX;
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changed = true;
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break;
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case ASMIT_INY:
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ins.mType = ASMIT_INX;
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changed = true;
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break;
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case ASMIT_DEY:
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ins.mType = ASMIT_DEX;
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changed = true;
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break;
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case ASMIT_TAY:
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ins.mType = ASMIT_TAX;
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changed = true;
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break;
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case ASMIT_TYA:
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ins.mType = ASMIT_TXA;
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changed = true;
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break;
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}
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}
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if (mTrueJump && !mTrueJump->GlobalSwapXY())
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changed = true;
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if (mFalseJump && !mFalseJump->GlobalSwapXY())
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changed = true;
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}
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return changed;
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}
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bool NativeCodeBasicBlock::OptimizeXYPairUsage(void)
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{
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bool changed = false;
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@ -14487,6 +14610,49 @@ bool NativeCodeBasicBlock::ExpandADCToBranch(NativeCodeProcedure* proc)
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break;
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}
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if (mIns[i + 0].mType == ASMIT_TXA &&
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mIns[i + 1].mType == ASMIT_CLC &&
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mIns[i + 2].mType == ASMIT_ADC && mIns[i + 2].mMode == ASMIM_IMMEDIATE && mIns[i + 2].mAddress == 1 &&
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mIns[i + 3].mType == ASMIT_TAX &&
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mIns[i + 4].mType == ASMIT_LDA &&
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mIns[i + 5].mType == ASMIT_ADC && mIns[i + 5].mMode == ASMIM_IMMEDIATE && mIns[i + 5].mAddress == 0 &&
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mIns[i + 6].mType == ASMIT_STA && mIns[i + 4].SameEffectiveAddress(mIns[i + 6]) &&
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HasAsmInstructionMode(ASMIT_INC, mIns[i + 6].mMode) &&
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!(mIns[i + 6].mLive & (LIVE_CPU_REG_C | LIVE_CPU_REG_Z)))
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{
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changed = true;
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NativeCodeBasicBlock* iblock = proc->AllocateBlock();
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NativeCodeBasicBlock* fblock = proc->AllocateBlock();
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fblock->mTrueJump = mTrueJump;
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fblock->mFalseJump = mFalseJump;
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fblock->mBranch = mBranch;
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mIns[i + 0].mType = ASMIT_NOP; mIns[i + 1].mMode = ASMIM_IMPLIED;
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mIns[i + 1].mType = ASMIT_NOP;
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mIns[i + 2].mType = ASMIT_NOP; mIns[i + 2].mMode = ASMIM_IMPLIED;
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mIns[i + 3].mType = ASMIT_INX; mIns[i + 3].mLive |= LIVE_CPU_REG_Z;
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fblock->mIns.Push(mIns[i + 4]);
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for (int j = i + 7; j < mIns.Size(); j++)
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fblock->mIns.Push(mIns[j]);
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iblock->mIns.Push(mIns[i + 6]);
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mIns.SetSize(i + 4);
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iblock->mIns[0].mType = ASMIT_INC;
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iblock->mTrueJump = fblock;
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iblock->mBranch = ASMIT_JMP;
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mTrueJump = fblock;
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mFalseJump = iblock;
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mBranch = ASMIT_BNE;
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break;
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}
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}
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#endif
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#if 1
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@ -15106,6 +15272,39 @@ bool NativeCodeBasicBlock::ExpandADCToBranch(NativeCodeProcedure* proc)
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}
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if (mIns.Size() >= 1 && mExitRequiredRegs.Size() > 0)
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{
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int sz = mIns.Size();
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if (mIns[sz - 1].mType == ASMIT_CMP && mBranch == ASMIT_BNE)
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{
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if (mTrueJump->mIns.Size() == 1 && mTrueJump->mBranch == ASMIT_BCC && mTrueJump->mFalseJump == mFalseJump)
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{
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if (mTrueJump->mIns[0].mType == ASMIT_STA && mTrueJump->mIns[0].mMode == ASMIM_ZERO_PAGE && !mFalseJump->mEntryRequiredRegs[mTrueJump->mIns[0].mAddress])
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{
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printf("Blumb");
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if (mIns[sz - 1].mMode == ASMIM_IMMEDIATE)
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{
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mIns.Insert(sz - 1, mTrueJump->mIns[0]);
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mIns[sz - 1].mLive |= LIVE_CPU_REG_A;
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}
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else
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mIns.Push(mTrueJump->mIns[0]);
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mExitRequiredRegs += mTrueJump->mIns[0].mAddress;
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mTrueJump->mEntryBlocks.RemoveAll(this);
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mTrueJump->mNumEntries--;
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mBranch = ASMIT_BCC;
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mTrueJump = mTrueJump->mTrueJump;
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mTrueJump->mNumEntries++;
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mTrueJump->mEntryBlocks.Push(this);
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changed = true;
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}
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}
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}
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}
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if (mIns.Size() >= 3 && mFalseJump && (mBranch == ASMIT_BCC || mBranch == ASMIT_BCS))
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{
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int sz = mIns.Size();
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@ -17209,6 +17408,38 @@ bool NativeCodeBasicBlock::JoinTailCodeSequences(NativeCodeProcedure* proc, bool
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}
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}
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if (mIns.Size() >= 1 && mTrueJump && !mFalseJump && mTrueJump->mIns.Size() > 0)
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{
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int sz = mIns.Size();
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if (mIns[sz - 1].mType == ASMIT_STA && mTrueJump->mIns[0].mType == ASMIT_LDA && mIns[sz - 1].SameEffectiveAddress(mTrueJump->mIns[0]))
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{
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int i = 0;
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while (i < mTrueJump->mEntryBlocks.Size() && !mTrueJump->mEntryBlocks[i]->mFalseJump)
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i++;
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if (i == mTrueJump->mEntryBlocks.Size())
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{
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for (int j = 0; j < mTrueJump->mEntryBlocks.Size(); j++)
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{
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if (mTrueJump->mEntryBlocks[j] != this)
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{
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mTrueJump->mEntryBlocks[j]->mIns.Push(mTrueJump->mIns[0]);
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mTrueJump->mEntryBlocks[j]->mExitRequiredRegs += CPU_REG_A;
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mTrueJump->mEntryBlocks[j]->mExitRequiredRegs += CPU_REG_Z;
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}
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}
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mExitRequiredRegs += CPU_REG_A;
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mExitRequiredRegs += CPU_REG_Z;
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mTrueJump->mIns.Remove(0);
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mTrueJump->mEntryRequiredRegs += CPU_REG_A;
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mTrueJump->mEntryRequiredRegs += CPU_REG_Z;
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changed = true;
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CheckLive();
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}
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}
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}
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#endif
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if (mIns.Size() >= 1 && mIns[0].mType == ASMIT_STA && mIns[0].mMode == ASMIM_ZERO_PAGE && !(mIns[0].mMode & (LIVE_CPU_REG_A | LIVE_CPU_REG_Z)) && mEntryBlocks.Size() == 2)
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@ -24665,6 +24896,11 @@ bool NativeCodeBasicBlock::OptimizeSimpleLoopInvariant(NativeCodeProcedure* proc
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for (int i = 0; i < mIns.Size(); i++)
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mIns[i].mLive |= LIVE_CPU_REG_X;
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mExitRequiredRegs += CPU_REG_X;
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mEntryRequiredRegs += CPU_REG_X;
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prevBlock->mExitRequiredRegs += CPU_REG_X;
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exitBlock->mEntryRequiredRegs += CPU_REG_X;
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CheckLive();
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return true;
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}
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@ -25087,6 +25323,67 @@ bool NativeCodeBasicBlock::OptimizeSimpleLoopInvariant(NativeCodeProcedure* proc
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}
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}
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#if 1
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for (int i = 0; i < mIns.Size(); i++)
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{
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if (mIns[i + 0].mType == ASMIT_CLC &&
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mIns[i + 1].mType == ASMIT_LDA && mIns[i + 1].mMode == ASMIM_ZERO_PAGE &&
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mIns[i + 2].mType == ASMIT_ADC && mIns[i + 2].mMode == ASMIM_ZERO_PAGE &&
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mIns[i + 3].mType == ASMIT_STA && mIns[i + 3].mMode == ASMIM_ZERO_PAGE &&
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mIns[i + 4].mType == ASMIT_LDA && mIns[i + 4].mMode == ASMIM_ZERO_PAGE && mIns[i + 4].mAddress == mIns[i + 1].mAddress + 1 &&
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mIns[i + 5].mType == ASMIT_ADC && mIns[i + 5].mMode == ASMIM_IMMEDIATE && mIns[i + 5].mAddress == 0 &&
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mIns[i + 6].mType == ASMIT_STA && mIns[i + 6].mMode == ASMIM_ZERO_PAGE && mIns[i + 6].mAddress == mIns[i + 3].mAddress + 1)
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{
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int treg = mIns[i + 3].mAddress;
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int sreg = mIns[i + 1].mAddress;
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int areg = mIns[i + 2].mAddress;
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if (sreg != treg && areg != treg &&
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!mExitRequiredRegs[treg] && !mExitRequiredRegs[treg + 1] &&
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!ReferencesZeroPage(treg, 0, i) && !ReferencesZeroPage(treg + 1, 0, i) &&
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!ChangesZeroPage(treg, i + 7) && !ChangesZeroPage(treg + 1, i + 7) &&
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!ChangesZeroPage(sreg) && !ChangesZeroPage(sreg + 1))
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{
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int j = i + 7;
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while (j < mIns.Size() && !mIns[j].ReferencesZeroPage(treg) && !mIns[j].ReferencesZeroPage(treg + 1) && !mIns[j].ChangesZeroPage(areg))
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j++;
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if (j < mIns.Size() && mIns[j].mMode == ASMIM_INDIRECT_Y && mIns[j].mAddress == treg)
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{
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if (mIns[j - 1].mType == ASMIT_LDY && mIns[j - 1].mMode == ASMIM_IMMEDIATE && !(mIns[j].mLive & LIVE_CPU_REG_Y) && !ReferencesZeroPage(treg, j + 1) && !ReferencesZeroPage(treg + 1, j + 1))
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{
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if (!prevBlock)
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return OptimizeSimpleLoopInvariant(proc, full);
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prevBlock->mIns.Push(NativeCodeInstruction(ASMIT_CLC));
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prevBlock->mIns.Push(NativeCodeInstruction(ASMIT_LDA, ASMIM_ZERO_PAGE, sreg));
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prevBlock->mIns.Push(NativeCodeInstruction(ASMIT_ADC, ASMIM_IMMEDIATE, mIns[j - 1].mAddress));
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prevBlock->mIns.Push(NativeCodeInstruction(ASMIT_STA, ASMIM_ZERO_PAGE, treg));
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prevBlock->mIns.Push(NativeCodeInstruction(ASMIT_LDA, ASMIM_ZERO_PAGE, sreg + 1));
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prevBlock->mIns.Push(NativeCodeInstruction(ASMIT_ADC, ASMIM_IMMEDIATE, 0));
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prevBlock->mIns.Push(NativeCodeInstruction(ASMIT_STA, ASMIM_ZERO_PAGE, treg + 1));
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prevBlock->mExitRequiredRegs += treg;
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prevBlock->mExitRequiredRegs += treg + 1;
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mIns[j - 1].mMode = ASMIM_ZERO_PAGE;
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mIns[j - 1].mAddress = areg;
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mEntryRequiredRegs += treg;
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mEntryRequiredRegs += treg + 1;
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mExitRequiredRegs += treg;
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mExitRequiredRegs += treg + 1;
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mIns[i + 3].mType = ASMIT_NOP; mIns[i + 3].mMode = ASMIM_IMPLIED;
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mIns[i + 6].mType = ASMIT_NOP; mIns[i + 6].mMode = ASMIM_IMPLIED;
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changed = true;
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}
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}
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}
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}
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}
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#endif
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CheckLive();
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return changed;
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@ -28013,7 +28310,7 @@ void NativeCodeBasicBlock::BlockSizeReduction(NativeCodeProcedure* proc, int xen
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}
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}
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bool NativeCodeBasicBlock::ReferencesAccu(int from) const
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bool NativeCodeBasicBlock::ReferencesAccu(int from, int to) const
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{
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for (int i = from; i < mIns.Size(); i++)
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if (mIns[i].ReferencesAccu())
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@ -28021,65 +28318,73 @@ bool NativeCodeBasicBlock::ReferencesAccu(int from) const
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return false;
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}
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bool NativeCodeBasicBlock::ReferencesYReg(int from) const
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bool NativeCodeBasicBlock::ReferencesYReg(int from, int to) const
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{
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for (int i = from; i < mIns.Size(); i++)
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if (to > mIns.Size()) to = mIns.Size();
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for (int i = from; i < to; i++)
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if (mIns[i].ReferencesYReg())
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return true;
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return false;
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}
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bool NativeCodeBasicBlock::ReferencesXReg(int from) const
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bool NativeCodeBasicBlock::ReferencesXReg(int from, int to) const
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{
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for (int i = from; i < mIns.Size(); i++)
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if (to > mIns.Size()) to = mIns.Size();
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for (int i = from; i < to; i++)
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if (mIns[i].ReferencesXReg())
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return true;
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return false;
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}
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bool NativeCodeBasicBlock::ChangesAccu(int from) const
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bool NativeCodeBasicBlock::ChangesAccu(int from, int to) const
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{
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for (int i = from; i < mIns.Size(); i++)
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if (to > mIns.Size()) to = mIns.Size();
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for (int i = from; i < to; i++)
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if (mIns[i].ChangesAccu())
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return true;
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return false;
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}
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bool NativeCodeBasicBlock::ChangesYReg(int from) const
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bool NativeCodeBasicBlock::ChangesYReg(int from, int to) const
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{
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for (int i = from; i < mIns.Size(); i++)
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if (to > mIns.Size()) to = mIns.Size();
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for (int i = from; i < to; i++)
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if (mIns[i].ChangesYReg())
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return true;
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return false;
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}
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bool NativeCodeBasicBlock::ChangesXReg(int from) const
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bool NativeCodeBasicBlock::ChangesXReg(int from, int to) const
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{
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for (int i = from; i < mIns.Size(); i++)
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if (to > mIns.Size()) to = mIns.Size();
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for (int i = from; i < to; i++)
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if (mIns[i].ChangesXReg())
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return true;
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return false;
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}
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bool NativeCodeBasicBlock::ChangesZeroPage(int address, int from) const
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bool NativeCodeBasicBlock::ChangesZeroPage(int address, int from, int to) const
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{
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for (int i = from; i < mIns.Size(); i++)
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if (to > mIns.Size()) to = mIns.Size();
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for (int i = from; i < to; i++)
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if (mIns[i].ChangesZeroPage(address))
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return true;
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return false;
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}
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bool NativeCodeBasicBlock::UsesZeroPage(int address, int from) const
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bool NativeCodeBasicBlock::UsesZeroPage(int address, int from, int to) const
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{
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for (int i = from; i < mIns.Size(); i++)
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if (to > mIns.Size()) to = mIns.Size();
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for (int i = from; i < to; i++)
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if (mIns[i].UsesZeroPage(address))
|
||||
return true;
|
||||
return false;
|
||||
}
|
||||
|
||||
bool NativeCodeBasicBlock::ReferencesZeroPage(int address, int from) const
|
||||
bool NativeCodeBasicBlock::ReferencesZeroPage(int address, int from, int to) const
|
||||
{
|
||||
for (int i = from; i < mIns.Size(); i++)
|
||||
if (to > mIns.Size()) to = mIns.Size();
|
||||
for (int i = from; i < to; i++)
|
||||
if (mIns[i].ReferencesZeroPage(address))
|
||||
return true;
|
||||
return false;
|
||||
|
@ -30120,6 +30425,15 @@ bool NativeCodeBasicBlock::PeepHoleOptimizer(NativeCodeProcedure* proc, int pass
|
|||
mIns[i + 2].mType = ASMIT_STA;
|
||||
progress = true;
|
||||
}
|
||||
else if (
|
||||
mIns[i + 0].mType == ASMIT_STA &&
|
||||
mIns[i + 1].IsShiftOrInc() &&
|
||||
mIns[i + 2].mType == ASMIT_LDA && mIns[i + 2].SameEffectiveAddress(mIns[i + 0]) && !mIns[i + 2].SameEffectiveAddress(mIns[i + 1]) && !(mIns[i + 2].mLive & LIVE_CPU_REG_Z))
|
||||
{
|
||||
mIns[i + 1].mLive |= LIVE_CPU_REG_A;
|
||||
mIns[i + 2].mType = ASMIT_NOP; mIns[i + 2].mMode = ASMIM_IMPLIED;
|
||||
progress = true;
|
||||
}
|
||||
|
||||
else if (mIns[i + 0].mType == ASMIT_STA && mIns[i + 0].mMode == ASMIM_ZERO_PAGE &&
|
||||
mIns[i + 1].mType == ASMIT_LDA && mIns[i + 1].mMode != ASMIM_ZERO_PAGE &&
|
||||
|
@ -34946,11 +35260,12 @@ void NativeCodeProcedure::RebuildEntry(void)
|
|||
|
||||
void NativeCodeProcedure::Optimize(void)
|
||||
{
|
||||
CheckFunc = !strcmp(mInterProc->mIdent->mString, "tile_draw_p");
|
||||
CheckFunc = !strcmp(mInterProc->mIdent->mString, "memmove");
|
||||
|
||||
#if 1
|
||||
int step = 0;
|
||||
int cnt = 0;
|
||||
bool swappedXY = false;
|
||||
|
||||
#if _DEBUG
|
||||
ResetVisited();
|
||||
|
@ -35458,7 +35773,6 @@ void NativeCodeProcedure::Optimize(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
|
||||
#if 1
|
||||
if (step == 7)
|
||||
{
|
||||
|
@ -35487,6 +35801,24 @@ void NativeCodeProcedure::Optimize(void)
|
|||
|
||||
#endif
|
||||
|
||||
#if 1
|
||||
if (step == 9)
|
||||
{
|
||||
if (changed)
|
||||
swappedXY = false;
|
||||
else if (!swappedXY)
|
||||
{
|
||||
ResetVisited();
|
||||
if (mEntryBlock->CanGlobalSwapXY())
|
||||
{
|
||||
ResetVisited();
|
||||
changed = mEntryBlock->GlobalSwapXY();
|
||||
swappedXY = true;
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#if 1
|
||||
if (cnt > 190)
|
||||
{
|
||||
|
@ -35501,7 +35833,7 @@ void NativeCodeProcedure::Optimize(void)
|
|||
}
|
||||
|
||||
#if 1
|
||||
if (!changed && step < 9)
|
||||
if (!changed && step < 10)
|
||||
{
|
||||
cnt = 0;
|
||||
step++;
|
||||
|
@ -35553,12 +35885,18 @@ void NativeCodeProcedure::Optimize(void)
|
|||
}
|
||||
}
|
||||
|
||||
#if _DEBUG
|
||||
ResetVisited();
|
||||
mEntryBlock->CheckBlocks();
|
||||
#endif
|
||||
|
||||
if (!changed)
|
||||
{
|
||||
ResetVisited();
|
||||
changed = mEntryBlock->PeepHoleOptimizer(this, 10);
|
||||
changed = mEntryBlock->PeepHoleOptimizer(this, 20);
|
||||
}
|
||||
|
||||
|
||||
if (!changed)
|
||||
{
|
||||
ResetVisited();
|
||||
|
@ -35568,6 +35906,10 @@ void NativeCodeProcedure::Optimize(void)
|
|||
} while (changed);
|
||||
#endif
|
||||
|
||||
ResetVisited();
|
||||
NativeRegisterDataSet data;
|
||||
mEntryBlock->ValueForwarding(data, true, true);
|
||||
|
||||
#if 1
|
||||
ResetVisited();
|
||||
mEntryBlock->BlockSizeReduction(this, -1, -1);
|
||||
|
|
|
@ -209,17 +209,17 @@ public:
|
|||
|
||||
void ShortcutTailRecursion();
|
||||
|
||||
bool ReferencesAccu(int from = 0) const;
|
||||
bool ReferencesYReg(int from = 0) const;
|
||||
bool ReferencesXReg(int from = 0) const;
|
||||
bool ReferencesAccu(int from = 0, int to = 65536) const;
|
||||
bool ReferencesYReg(int from = 0, int to = 65536) const;
|
||||
bool ReferencesXReg(int from = 0, int to = 65536) const;
|
||||
|
||||
bool ChangesAccu(int from = 0) const;
|
||||
bool ChangesYReg(int from = 0) const;
|
||||
bool ChangesXReg(int from = 0) const;
|
||||
bool ChangesAccu(int from = 0, int to = 65536) const;
|
||||
bool ChangesYReg(int from = 0, int to = 65536) const;
|
||||
bool ChangesXReg(int from = 0, int to = 65536) const;
|
||||
|
||||
bool ChangesZeroPage(int address, int from = 0) const;
|
||||
bool UsesZeroPage(int address, int from = 0) const;
|
||||
bool ReferencesZeroPage(int address, int from = 0) const;
|
||||
bool ChangesZeroPage(int address, int from = 0, int to = 65536) const;
|
||||
bool UsesZeroPage(int address, int from = 0, int to = 65536) const;
|
||||
bool ReferencesZeroPage(int address, int from = 0, int to = 65536) const;
|
||||
|
||||
|
||||
bool RemoveNops(void);
|
||||
|
@ -476,6 +476,9 @@ public:
|
|||
|
||||
bool AlternateXYUsage(void);
|
||||
bool OptimizeXYPairUsage(void);
|
||||
bool CanGlobalSwapXY(void);
|
||||
bool GlobalSwapXY(void);
|
||||
|
||||
bool ForwardAbsoluteLoadStores(void);
|
||||
bool CanForwardZPMove(int saddr, int daddr, int & index) const;
|
||||
bool Is16BitAddSubImmediate(int at, int& sreg, int &dreg, int& offset) const;
|
||||
|
|
Loading…
Reference in New Issue