Fix bugs found by llvm lint

This commit is contained in:
drmortalwombat 2021-10-17 10:40:33 +02:00
parent 194c7a2af4
commit 3520d2a2bd
8 changed files with 146 additions and 23 deletions

View File

@ -11,13 +11,59 @@ int sum(int * a, int s)
return sum;
}
void copy(int * d, const int * s, int n)
{
for(int i=0; i<n ; i++)
d[i] = s[i];
}
void reverse(int * d, const int * s, int n)
{
for(int i=0; i<n ; i++)
d[i] = s[n - i - 1];
}
int sumb(int * a, char s)
{
int sum = 0;
for(char i=0; i<s; i++)
{
sum += a[i];
}
return sum;
}
void copyb(int * d, const int * s, char n)
{
for(char i=0; i<n ; i++)
d[i] = s[i];
}
void reverseb(int * d, const int * s, char n)
{
for(char i=0; i<n ; i++)
d[i] = s[n - i - 1];
}
int main(void)
{
int a[100];
int a[100], b[100], c[100];
for(int i=0; i<100; i++)
{
a[i] = i % 10;
}
assert(sum(a, 100) == 450);
copy(b, a, 100);
assert(sum(b, 100) == 450);
reverse(c, a, 100);
assert(sum(c, 100) == 450);
assert(sumb(a, 100) == 450);
copyb(b, a, 100);
assert(sumb(b, 100) == 450);
reverseb(c, a, 100);
assert(sumb(c, 100) == 450);
return 0;
}

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@ -112,13 +112,13 @@ __asm bcexec
sta ip + 1
ldy #0
lda #<done
lda #<bdone
sta (sp), y
iny
lda #>done
lda #>bdone
sta (sp), y
jmp startup.pexec
done: nop
bdone: nop
pla
pla
pla

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@ -81,35 +81,35 @@ char getchar(void)
void puts(const char * str)
{
__asm {
loop:
ploop:
ldy #0
lda (str), y
beq done
beq pdone
jsr putpch
inc str
bne loop
bne ploop
inc str + 1
bne loop
done:
bne ploop
pdone:
}
}
char * gets(char * str)
{
__asm {
loop:
gloop:
jsr getpch
ldy #0
cmp #10
beq done
beq gdone
sta (str), y
inc str
bne loop
bne gloop
inc str + 1
bne loop
done:
bne gloop
gdone:
lda #0
sta (str), y
}

View File

@ -170,7 +170,11 @@ protected:
range = range * 2;
a2 = new T[range];
for (i = 0; i < size; i++) a2[i] = array[i];
if (to > size)
for (i = 0; i < size; i++) a2[i] = array[i];
else
for (i = 0; i < to; i++) a2[i] = array[i];
delete[] array;
array = a2;
}

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@ -935,7 +935,7 @@ void ByteCodeBasicBlock::StoreDirectValue(InterCodeProcedure* proc, const InterI
ByteCodeInstruction bins(BC_STORE_ADDR_32);
bins.mRegister = BC_REG_ACCU;
bins.mValue = ins->mSrc[1].mIntConst;
bins.mValue = index;
mIns.Push(bins);
}
}

View File

@ -1495,7 +1495,7 @@ InterCodeGenerator::ExValue InterCodeGenerator::TranslateExpression(Declaration*
if (vl.mType->mFlags & DTF_CONST)
mErrors->Error(exp->mLocation, EERR_CONST_ASSIGN, "Cannot change const value");
InterInstruction * cins = new InterInstruction(), * ains = new InterInstruction(), * rins = new InterInstruction(), * sins = new InterInstruction();
InterInstruction * cins = new InterInstruction(), * ains = new InterInstruction(), * sins = new InterInstruction();
ExValue vdl = Dereference(proc, block, vl);
@ -1555,7 +1555,7 @@ InterCodeGenerator::ExValue InterCodeGenerator::TranslateExpression(Declaration*
if (vl.mType->mFlags & DTF_CONST)
mErrors->Error(exp->mLocation, EERR_CONST_ASSIGN, "Cannot change const value");
InterInstruction * cins = new InterInstruction(), * ains = new InterInstruction(), * rins = new InterInstruction(), * sins = new InterInstruction();
InterInstruction * cins = new InterInstruction(), * ains = new InterInstruction(), * sins = new InterInstruction();
ExValue vdl = Dereference(proc, block, vl);

View File

@ -567,6 +567,14 @@ bool NativeCodeInstruction::RequiresAccu(void) const
}
}
bool NativeCodeInstruction::UsesAccu(void) const
{
if (ChangesAccu())
return true;
return mType == ASMIT_STA || mType == ASMIT_CMP || mType == ASMIT_TAX || mType == ASMIT_TAY;
}
bool NativeCodeInstruction::ChangesAccu(void) const
{
if (mMode == ASMIM_IMPLIED)
@ -595,6 +603,11 @@ bool NativeCodeInstruction::ChangesAddress(void) const
return false;
}
bool NativeCodeInstruction::IsShift(void) const
{
return mType == ASMIT_ASL || mType == ASMIT_LSR || mType == ASMIT_ROL || mType == ASMIT_ROR;
}
bool NativeCodeInstruction::IsCommutative(void) const
{
return mType == ASMIT_ADC || mType == ASMIT_AND || mType == ASMIT_ORA || mType == ASMIT_EOR;
@ -673,6 +686,14 @@ bool NativeCodeInstruction::ApplySimulation(const NativeRegisterDataSet& data)
mAddress = data.mRegs[mAddress].mValue;
return true;
}
else if (mMode == ASMIM_ZERO_PAGE && data.mRegs[mAddress].mMode == NRDM_IMMEDIATE_ADDRESS)
{
mMode = ASMIM_IMMEDIATE_ADDRESS;
mLinkerObject = data.mRegs[mAddress].mLinkerObject;
mFlags = data.mRegs[mAddress].mFlags;
mAddress = data.mRegs[mAddress].mValue;
return true;
}
break;
}
@ -1185,6 +1206,14 @@ void NativeCodeInstruction::Simulate(NativeRegisterDataSet& data)
data.mRegs[CPU_REG_Z].mValue = mAddress;
data.mRegs[CPU_REG_Z].mMode = NRDM_IMMEDIATE;
}
else if (mMode == ASMIM_IMMEDIATE_ADDRESS)
{
data.mRegs[CPU_REG_A].mValue = mAddress;
data.mRegs[CPU_REG_A].mLinkerObject = mLinkerObject;
data.mRegs[CPU_REG_A].mFlags = mFlags;
data.mRegs[CPU_REG_A].mMode = NRDM_IMMEDIATE_ADDRESS;
data.mRegs[CPU_REG_Z].Reset();
}
else
{
data.mRegs[CPU_REG_A].Reset();
@ -1257,10 +1286,9 @@ void NativeCodeInstruction::Simulate(NativeRegisterDataSet& data)
case ASMIT_STA:
if (reg >= 0)
{
if (data.mRegs[CPU_REG_A].mMode == NRDM_IMMEDIATE)
if (data.mRegs[CPU_REG_A].mMode == NRDM_IMMEDIATE || data.mRegs[CPU_REG_A].mMode == NRDM_IMMEDIATE_ADDRESS)
{
data.mRegs[reg].mValue = data.mRegs[CPU_REG_A].mValue;
data.mRegs[reg].mMode = NRDM_IMMEDIATE;
data.mRegs[reg] = data.mRegs[CPU_REG_A];
}
else
{
@ -1393,6 +1421,7 @@ bool NativeCodeInstruction::ValueForwarding(NativeRegisterDataSet& data)
data.mRegs[CPU_REG_A].mValue = mAddress;
data.mRegs[CPU_REG_A].mLinkerObject = mLinkerObject;
data.mRegs[CPU_REG_A].mFlags = mFlags;
data.mRegs[CPU_REG_Z].Reset();
}
else
{
@ -6625,13 +6654,30 @@ void NativeCodeBasicBlock::BuildEntryDataSet(const NativeRegisterDataSet& set)
{
if (set.mRegs[i].mMode == NRDM_IMMEDIATE)
{
if (mEntryRegisterDataSet.mRegs[i].mMode == NRDM_IMMEDIATE && set.mRegs[i].mValue != mEntryRegisterDataSet.mRegs[i].mValue)
if (mEntryRegisterDataSet.mRegs[i].mMode == NRDM_IMMEDIATE && set.mRegs[i].mValue == mEntryRegisterDataSet.mRegs[i].mValue)
{
}
else if (mEntryRegisterDataSet.mRegs[i].mMode != NRDM_UNKNOWN)
{
mEntryRegisterDataSet.mRegs[i].Reset();
mVisited = false;
}
}
else if (mEntryRegisterDataSet.mRegs[i].mMode == NRDM_IMMEDIATE)
else if (set.mRegs[i].mMode == NRDM_IMMEDIATE_ADDRESS)
{
if (mEntryRegisterDataSet.mRegs[i].mMode == NRDM_IMMEDIATE_ADDRESS &&
set.mRegs[i].mValue == mEntryRegisterDataSet.mRegs[i].mValue &&
set.mRegs[i].mLinkerObject == mEntryRegisterDataSet.mRegs[i].mLinkerObject &&
set.mRegs[i].mFlags == mEntryRegisterDataSet.mRegs[i].mFlags)
{
}
else if (mEntryRegisterDataSet.mRegs[i].mMode != NRDM_UNKNOWN)
{
mEntryRegisterDataSet.mRegs[i].Reset();
mVisited = false;
}
}
else if (mEntryRegisterDataSet.mRegs[i].mMode != NRDM_UNKNOWN)
{
mEntryRegisterDataSet.mRegs[i].Reset();
mVisited = false;
@ -7812,6 +7858,31 @@ bool NativeCodeBasicBlock::PeepHoleOptimizer(void)
mIns[i + 1].mType = ASMIT_NOP; mIns[i + 1].mMode = ASMIM_IMPLIED;
progress = true;
}
else if (
mIns[i + 0].mType == ASMIT_STA && mIns[i + 0].mMode == ASMIM_ZERO_PAGE &&
!mIns[i + 1].UsesZeroPage(mIns[i + 0].mAddress) && !mIns[i + 1].UsesAccu() &&
mIns[i + 2].IsShift() && mIns[i + 2].mMode == ASMIM_ZERO_PAGE && mIns[i + 2].mAddress == mIns[i + 0].mAddress && !(mIns[i + 2].mLive & LIVE_CPU_REG_A))
{
mIns[i + 0] = mIns[i + 1];
mIns[i + 1] = mIns[i + 2];
mIns[i + 1].mMode = ASMIM_IMPLIED;
mIns[i + 2].mType = ASMIT_STA;
mIns[i + 2].mLive |= mIns[i + 1].mLive & LIVE_CPU_REG_C;
progress = true;
}
else if (
mIns[i + 0].mType == ASMIT_STA && mIns[i + 0].mMode == ASMIM_ZERO_PAGE &&
mIns[i + 1].mType == ASMIT_LDA && mIns[i + 1].mMode == ASMIM_IMMEDIATE &&
mIns[i + 2].IsShift() && mIns[i + 2].mMode == ASMIM_ZERO_PAGE && mIns[i + 2].mAddress == mIns[i + 0].mAddress)
{
mIns[i + 0] = mIns[i + 2];
mIns[i + 2] = mIns[i + 1];
mIns[i + 1] = mIns[i + 0];
mIns[i + 0].mMode = ASMIM_IMPLIED;
mIns[i + 1].mType = ASMIT_STA;
mIns[i + 2].mLive |= mIns[i + 1].mLive & LIVE_CPU_REG_C;
progress = true;
}
#if 1
else if (
mIns[i + 0].mMode != ASMIM_RELATIVE &&

View File

@ -68,6 +68,7 @@ public:
bool ChangesAccuAndFlag(void) const;
bool ChangesAddress(void) const;
bool ChangesAccu(void) const;
bool UsesAccu(void) const;
bool ChangesCarry(void) const;
bool RequiresAccu(void) const;
bool RequiresYReg(void) const;
@ -78,6 +79,7 @@ public:
bool SameEffectiveAddress(const NativeCodeInstruction& ins) const;
bool IsSame(const NativeCodeInstruction& ins) const;
bool IsCommutative(void) const;
bool IsShift(void) const;
};
class NativeCodeBasicBlock