Fix x reg zp dependency during peephole shuffle
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ea33f253d4
commit
4e2a2c99ba
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@ -421,7 +421,8 @@ void rirq_addrhi(RIRQCode * ic, byte n, byte hi)
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void rirq_data(RIRQCode * ic, byte n, byte data)
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{
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byte p = irqdi[n];
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ic->code[p] = data;
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// ic->code[p] = data;
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(volatile char *)(ic->code)[p] = data;
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}
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void rirq_write(RIRQCode * ic, byte n, void * addr, byte data)
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@ -640,6 +641,7 @@ void rirq_sort(void)
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#endif
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npos++;
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nextIRQ = 0;
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byte yp = rasterIRQNext[nextIRQ];
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if (yp != 0xff)
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vic.raster = yp - 1;
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@ -309,6 +309,8 @@ void vspr_update(void)
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if (!done && spriteYPos[ti + 9] < 250)
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{
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byte ri = spriteOrder[ti + 8];
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rirq_move(ti, spriteYPos[ti + 1] + 23);
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#ifdef VSPRITE_REVERSE
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char m = 0x80 >> (ti & 7);
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#else
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@ -325,7 +327,6 @@ void vspr_update(void)
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rirq_data(spirq + ti, 3, vspriteImage[ri]);
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rirq_data(spirq + ti, 4, xymask);
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rirq_move(ti, spriteYPos[ti + 1] + 23);
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// spriteYPos[ti + 9] = vspriteYLow[ri];
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}
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else
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@ -13518,7 +13518,9 @@ bool InterCodeBasicBlock::HoistCommonConditionalPath(void)
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{
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InterInstruction* ins = cblock->mInstructions[i];
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if (cblock->CanMoveInstructionBeforeBlock(i) && !HasSideEffect(ins->mCode) && ins->mDst.mTemp >= 0 && !cblock->IsTempModifiedInRange(i + 1, cblock->mInstructions.Size(), ins->mDst.mTemp))
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if (cblock->CanMoveInstructionBeforeBlock(i) && !HasSideEffect(ins->mCode) && ins->mDst.mTemp >= 0 &&
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!cblock->IsTempModifiedInRange(i + 1, cblock->mInstructions.Size(), ins->mDst.mTemp) &&
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!cblock->mExitRequiredTemps[ins->mDst.mTemp])
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{
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int j = 0;
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while (j < eblock->mInstructions.Size() && !eblock->mInstructions[j]->IsEqualSource(ins))
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@ -22898,7 +22900,7 @@ void InterCodeProcedure::Close(void)
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{
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GrowingTypeArray tstack(IT_NONE);
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CheckFunc = !strcmp(mIdent->mString, "f");
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CheckFunc = !strcmp(mIdent->mString, "main");
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CheckCase = false;
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mEntryBlock = mBlocks[0];
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@ -1565,6 +1565,10 @@ bool NativeCodeInstruction::RequiresAccu(void) const
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mType == ASMIT_TAX || mType == ASMIT_TAY ||
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mType == ASMIT_ASL || mType == ASMIT_LSR || mType == ASMIT_ROL || mType == ASMIT_ROR;
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}
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else if (mType == ASMIT_JSR)
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{
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return (mFlags & NCIF_USE_CPU_REG_A);
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}
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else
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{
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return
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@ -5354,7 +5358,7 @@ int NativeCodeBasicBlock::PutBranch(NativeCodeProcedure* proc, NativeCodeBasicBl
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}
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}
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void NativeCodeBasicBlock::LoadConstantToReg(InterCodeProcedure* proc, const InterInstruction* ins, const InterOperand& op, InterType type, int reg)
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void NativeCodeBasicBlock::LoadConstantToReg(InterCodeProcedure* proc, const InterInstruction* ins, const InterOperand& op, InterType type, int reg, bool checkRange)
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{
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if (type == IT_FLOAT)
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@ -5375,7 +5379,7 @@ void NativeCodeBasicBlock::LoadConstantToReg(InterCodeProcedure* proc, const Int
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{
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if (op.mMemory == IM_GLOBAL)
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{
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if (op.mIntConst < 0 || op.mIntConst > op.mLinkerObject->mSize)
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if (checkRange && (op.mIntConst < 0 || op.mIntConst > op.mLinkerObject->mSize))
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proc->mModule->mErrors->Error(ins->mLocation, EWARN_UNDEFINED_POINTER_ARITHMETIC, "Undefined constant pointer arithmetic");
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mIns.Push(NativeCodeInstruction(ins, ASMIT_LDA, ASMIM_IMMEDIATE_ADDRESS, op.mIntConst, op.mLinkerObject, NCIF_LOWER));
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@ -12770,7 +12774,7 @@ void NativeCodeBasicBlock::RelationalOperator(InterCodeProcedure* proc, const In
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if (lreg < 0)
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{
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lreg = BC_REG_ACCU;
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LoadConstantToReg(proc, ins, ins->mSrc[li], IT_POINTER, lreg);
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LoadConstantToReg(proc, ins, ins->mSrc[li], IT_POINTER, lreg, false);
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}
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else
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lreg = BC_REG_TMP + proc->mTempOffset[lreg];
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@ -12778,7 +12782,7 @@ void NativeCodeBasicBlock::RelationalOperator(InterCodeProcedure* proc, const In
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if (rreg < 0)
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{
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rreg = BC_REG_ACCU;
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LoadConstantToReg(proc, ins, ins->mSrc[ri], IT_POINTER, rreg);
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LoadConstantToReg(proc, ins, ins->mSrc[ri], IT_POINTER, rreg, false);
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}
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else
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rreg = BC_REG_TMP + proc->mTempOffset[rreg];
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@ -25122,6 +25126,7 @@ bool NativeCodeBasicBlock::JoinTailCodeSequences(NativeCodeProcedure* proc, bool
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}
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}
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}
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#if 1
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if (mIns.Size() >= 2 && mFalseJump)
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{
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@ -25222,6 +25227,8 @@ bool NativeCodeBasicBlock::JoinTailCodeSequences(NativeCodeProcedure* proc, bool
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int ns = mIns.Size();
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const NativeCodeInstruction& ins(mIns[ns - 2]);
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CheckLive();
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if (ins.mType == ASMIT_STA && ins.mMode == ASMIM_ZERO_PAGE && mTrueJump && mFalseJump && !mIns[ns-1].UsesZeroPage(ins.mAddress) && mTrueJump->mEntryRequiredRegs.Size() && mFalseJump->mEntryRequiredRegs.Size())
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{
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if (!mIns[ns - 1].ChangesAccu())
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@ -25255,6 +25262,7 @@ bool NativeCodeBasicBlock::JoinTailCodeSequences(NativeCodeProcedure* proc, bool
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{
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mIns[ns - 3].mType = ASMIT_LDX; mIns[ns - 3].mLive |= LIVE_CPU_REG_X;
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mIns[ns - 2].mType = ASMIT_STX;
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mIns[ns - 1].mLive |= LIVE_CPU_REG_X;
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mTrueJump->mIns.Insert(0, ins);
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mTrueJump->mIns[0].mLive |= LIVE_CPU_REG_C;
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if (mTrueJump->mEntryRequiredRegs[CPU_REG_A])
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@ -25269,6 +25277,7 @@ bool NativeCodeBasicBlock::JoinTailCodeSequences(NativeCodeProcedure* proc, bool
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{
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mIns[ns - 3].mType = ASMIT_LDX; mIns[ns - 3].mLive |= LIVE_CPU_REG_X;
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mIns[ns - 2].mType = ASMIT_STX;
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mIns[ns - 1].mLive |= LIVE_CPU_REG_X;
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mFalseJump->mIns.Insert(0, ins);
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mFalseJump->mIns[0].mLive |= LIVE_CPU_REG_C;
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if (mFalseJump->mEntryRequiredRegs[CPU_REG_A])
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@ -42659,25 +42668,6 @@ bool NativeCodeBasicBlock::PeepHoleOptimizerShuffle(int pass)
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}
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CheckLive();
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#endif
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// move sta zp, tax, lda abs,x , sta zp down to use
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#if 1
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for (int i = 0; i + 4 < mIns.Size(); i++)
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{
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if (mIns[i + 0].mType == ASMIT_STA && mIns[i + 0].mMode == ASMIM_ZERO_PAGE &&
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mIns[i + 1].mType == ASMIT_TAX &&
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mIns[i + 2].mType == ASMIT_LDA && mIns[i + 2].mMode == ASMIM_ABSOLUTE_X &&
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mIns[i + 3].mType == ASMIT_STA && mIns[i + 3].mMode == ASMIM_ZERO_PAGE &&
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!(mIns[i + 3].mLive & (LIVE_CPU_REG_A | LIVE_CPU_REG_X | LIVE_CPU_REG_Z)))
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{
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if (MoveStaTaxLdaStaDown(i))
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changed = true;
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}
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}
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CheckLive();
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#endif
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#if 1
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@ -43603,6 +43593,25 @@ bool NativeCodeBasicBlock::PeepHoleOptimizerShuffle(int pass)
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}
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CheckLive();
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#endif
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// move sta zp, tax, lda abs,x , sta zp down to use
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#if 1
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for (int i = 0; i + 4 < mIns.Size(); i++)
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{
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if (mIns[i + 0].mType == ASMIT_STA && mIns[i + 0].mMode == ASMIM_ZERO_PAGE &&
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mIns[i + 1].mType == ASMIT_TAX &&
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mIns[i + 2].mType == ASMIT_LDA && mIns[i + 2].mMode == ASMIM_ABSOLUTE_X &&
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mIns[i + 3].mType == ASMIT_STA && mIns[i + 3].mMode == ASMIM_ZERO_PAGE &&
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!(mIns[i + 3].mLive & (LIVE_CPU_REG_A | LIVE_CPU_REG_X | LIVE_CPU_REG_Z)))
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{
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if (MoveStaTaxLdaStaDown(i))
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changed = true;
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}
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}
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CheckLive();
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#endif
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@ -51506,7 +51515,7 @@ void NativeCodeProcedure::Compile(InterCodeProcedure* proc)
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mInterProc = proc;
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mInterProc->mLinkerObject->mNativeProc = this;
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CheckFunc = !strcmp(mInterProc->mIdent->mString, "room_check_wall");
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CheckFunc = !strcmp(mInterProc->mIdent->mString, "vspr_update");
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int nblocks = proc->mBlocks.Size();
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tblocks = new NativeCodeBasicBlock * [nblocks];
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@ -52461,13 +52470,11 @@ void NativeCodeProcedure::Optimize(void)
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CheckBlocks();
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#if 1
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ResetVisited();
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if (mEntryBlock->PeepHoleOptimizer(step))
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changed = true;
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#endif
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if (step == 2)
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{
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ResetVisited();
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@ -359,7 +359,7 @@ public:
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void CheckFrameIndex(const InterInstruction * ins, int & reg, int & index, int size, int treg = 0);
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void LoadValueToReg(InterCodeProcedure* proc, const InterInstruction * ins, int reg, const NativeCodeInstruction * ainsl, const NativeCodeInstruction* ainsh);
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void LoadConstantToReg(InterCodeProcedure* proc, const InterInstruction* ins, InterType type, int reg);
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void LoadConstantToReg(InterCodeProcedure* proc, const InterInstruction* ins, const InterOperand & op, InterType type, int reg);
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void LoadConstantToReg(InterCodeProcedure* proc, const InterInstruction* ins, const InterOperand & op, InterType type, int reg, bool checkRange = true);
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void LoadConstant(InterCodeProcedure* proc, const InterInstruction * ins);
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void StoreValue(InterCodeProcedure* proc, const InterInstruction * ins);
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