Optimize signed division by 4 and 8
This commit is contained in:
drmortalwombat
parent
d80518871a
commit
5e699a8dc0
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@ -7458,6 +7458,8 @@ int NativeCodeBasicBlock::ShortSignedDivide(InterCodeProcedure* proc, NativeCode
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sreg = dreg;
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}
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if (mul == 2)
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{
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mIns.Push(NativeCodeInstruction(ins, ASMIT_LDA, ASMIM_ZERO_PAGE, sreg + 1));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_ASL));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_LDA, ASMIM_ZERO_PAGE, sreg + 0));
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@ -7469,6 +7471,66 @@ int NativeCodeBasicBlock::ShortSignedDivide(InterCodeProcedure* proc, NativeCode
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mIns.Push(NativeCodeInstruction(ins, ASMIT_ROR));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_ROR, ASMIM_ZERO_PAGE, dreg + 0));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_STA, ASMIM_ZERO_PAGE, dreg + 1));
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}
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else if (mul == 4)
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{
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mIns.Push(NativeCodeInstruction(ins, ASMIT_LDA, ASMIM_ZERO_PAGE, sreg + 1));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_ASL));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_LDA, ASMIM_IMMEDIATE, 0x00));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_ADC, ASMIM_IMMEDIATE, 0xff));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_EOR, ASMIM_IMMEDIATE, 0xff));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_AND, ASMIM_IMMEDIATE, 0x03));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_CLC));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_ADC, ASMIM_ZERO_PAGE, sreg + 0));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_STA, ASMIM_ZERO_PAGE, dreg + 0));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_LDA, ASMIM_ZERO_PAGE, sreg + 1));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_ADC, ASMIM_IMMEDIATE, 0));
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// Two signed shifts
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mIns.Push(NativeCodeInstruction(ins, ASMIT_CMP, ASMIM_IMMEDIATE, 0x80));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_ROR));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_ROR, ASMIM_ZERO_PAGE, dreg + 0));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_CMP, ASMIM_IMMEDIATE, 0x80));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_ROR));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_ROR, ASMIM_ZERO_PAGE, dreg + 0));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_STA, ASMIM_ZERO_PAGE, dreg + 1));
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}
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else if (mul == 8)
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{
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mIns.Push(NativeCodeInstruction(ins, ASMIT_LDA, ASMIM_ZERO_PAGE, sreg + 1));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_ASL));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_LDA, ASMIM_IMMEDIATE, 0x00));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_ADC, ASMIM_IMMEDIATE, 0xff));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_EOR, ASMIM_IMMEDIATE, 0xff));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_AND, ASMIM_IMMEDIATE, 0x07));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_CLC));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_ADC, ASMIM_ZERO_PAGE, sreg + 0));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_STA, ASMIM_ZERO_PAGE, dreg + 0));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_LDA, ASMIM_ZERO_PAGE, sreg + 1));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_ADC, ASMIM_IMMEDIATE, 0));
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// Three signed shifts
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mIns.Push(NativeCodeInstruction(ins, ASMIT_LSR));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_ROR, ASMIM_ZERO_PAGE, dreg + 0));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_LSR));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_ROR, ASMIM_ZERO_PAGE, dreg + 0));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_LSR));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_ROR, ASMIM_ZERO_PAGE, dreg + 0));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_EOR, ASMIM_IMMEDIATE, 0x10));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_SEC));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_SBC, ASMIM_IMMEDIATE, 0x10));
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mIns.Push(NativeCodeInstruction(ins, ASMIT_STA, ASMIM_ZERO_PAGE, dreg + 1));
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}
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return dreg;
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}
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@ -9296,10 +9358,12 @@ NativeCodeBasicBlock* NativeCodeBasicBlock::BinaryOperator(InterCodeProcedure* p
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mIns.Push(NativeCodeInstruction(ins, ASMIT_JSR, ASMIM_ABSOLUTE, frt.mOffset, frt.mLinkerObject, NCIF_RUNTIME | NCIF_LOWER | NCIF_UPPER | NCIF_USE_CPU_REG_A));
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reg = BC_REG_WORK + 2;
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}
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else if (ins->mOperator == IA_DIVS && ins->mSrc[0].mTemp < 0 && ins->mSrc[0].mIntConst == 2)
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#if 1
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else if (ins->mOperator == IA_DIVS && ins->mSrc[0].mTemp < 0 && (ins->mSrc[0].mIntConst == 2 || ins->mSrc[0].mIntConst == 4 || ins->mSrc[0].mIntConst == 8))
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{
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reg = ShortSignedDivide(proc, nproc, ins, sins1, int(ins->mSrc[0].mIntConst));
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}
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#endif
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else
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{
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if (sins1)
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@ -15630,7 +15694,40 @@ bool NativeCodeBasicBlock::ExpandADCToBranch(NativeCodeProcedure* proc)
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neblock->Close(mIns[i].mIns, rblock, nullptr, ASMIT_JMP);
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break;
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}
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#if 1
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if (mIns[i + 0].mType == ASMIT_ASL && mIns[i + 0].mMode == ASMIM_IMPLIED &&
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mIns[i + 1].mType == ASMIT_LDA && mIns[i + 1].mMode == ASMIM_IMMEDIATE && mIns[i + 1].mAddress == 0x00 &&
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mIns[i + 2].mType == ASMIT_ADC && mIns[i + 2].mMode == ASMIM_IMMEDIATE && mIns[i + 2].mAddress == 0xff &&
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mIns[i + 3].mType == ASMIT_EOR && mIns[i + 3].mMode == ASMIM_IMMEDIATE && mIns[i + 3].mAddress == 0xff &&
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mIns[i + 4].mType == ASMIT_AND && mIns[i + 4].mMode == ASMIM_IMMEDIATE)
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{
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changed = true;
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NativeCodeBasicBlock* neblock = proc->AllocateBlock();
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NativeCodeBasicBlock* rblock = proc->AllocateBlock();
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neblock->mIns.Push(NativeCodeInstruction(mIns[i].mIns, ASMIT_LDA, ASMIM_IMMEDIATE, mIns[i + 4].mAddress));
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rblock->mTrueJump = mTrueJump;
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rblock->mFalseJump = mFalseJump;
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rblock->mBranch = mBranch;
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for (int j = i + 5; j < mIns.Size(); j++)
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rblock->mIns.Push(mIns[j]);
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mIns.SetSize(i + 1);
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mIns[i + 0].mLive |= LIVE_CPU_REG_Z;
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mIns[i + 0].mType = ASMIT_AND;
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mIns[i + 0].mMode = ASMIM_IMMEDIATE;
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mIns[i + 0].mAddress = 0x80;
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mTrueJump = rblock;
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mFalseJump = neblock;
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mBranch = ASMIT_BEQ;
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neblock->Close(mIns[i].mIns, rblock, nullptr, ASMIT_JMP);
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break;
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}
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#endif
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if (mIns[i + 0].mType == ASMIT_STA && mIns[i + 0].mMode == ASMIM_ZERO_PAGE &&
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mIns[i + 1].mType == ASMIT_ASL && mIns[i + 1].mMode == ASMIM_IMPLIED &&
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mIns[i + 2].mType == ASMIT_LDA && mIns[i + 2].mMode == ASMIM_IMMEDIATE && mIns[i + 2].mAddress == 0x00 &&
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@ -15968,6 +16065,7 @@ bool NativeCodeBasicBlock::ExpandADCToBranch(NativeCodeProcedure* proc)
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}
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#endif
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#if 1
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if (i + 5 < mIns.Size() &&
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mIns[i + 0].ChangesAccuAndFlag() &&
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@ -19852,6 +19950,31 @@ bool NativeCodeBasicBlock::JoinTailCodeSequences(NativeCodeProcedure* proc, bool
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}
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#endif
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#if 0
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if (mFalseJump && mIns.Size() > 1)
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{
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int sz = mIns.Size();
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if (mIns[sz - 1].mType == ASMIT_AND && mIns[sz - 1].mMode == ASMIM_IMMEDIATE && mIns[sz - 1].mAddress == 0x80)
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{
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if (mBranch == ASMIT_BEQ || mBranch == ASMIT_BPL)
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{
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if (mTrueJump->mIns.Size() > 0 && mTrueJump->mIns[0].mType == ASMIT_AND && mTrueJump->mEntryBlocks.Size() == 2)
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{
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NativeCodeBasicBlock* pblock = mTrueJump->mEntryBlocks[0];
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if (pblock == this)
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pblock = mTrueJump->mEntryBlocks[1];
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if (!pblock->mFalseJump)
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{
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pblock->mIns.Push(mTrueJump->mIns[0]);
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mTrueJump->mIns.Remove(0);
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changed = true;
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}
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}
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}
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}
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}
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#endif
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if (mFalseJump && !mFalseJump->mFalseJump && mTrueJump == mFalseJump->mTrueJump && mTrueJump->mNumEntries == 2 && mTrueJump->mIns.Size() > 0 && mIns.Size() > 0)
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{
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int sz = mIns.Size();
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@ -23061,7 +23184,11 @@ bool NativeCodeBasicBlock::JoinTAXARange(int from, int to)
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if (!(mIns[from].mLive & (LIVE_CPU_REG_A | LIVE_CPU_REG_C | LIVE_CPU_REG_Z)) && !(mIns[to].mLive & LIVE_CPU_REG_C))
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{
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start = from;
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while (start > 0 && mIns[start - 1].mType != ASMIT_LDA && (mIns[start - 1].mMode == ASMIM_IMMEDIATE || mIns[start - 1].mMode == ASMIM_IMPLIED))
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while (start > 0 &&
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mIns[start - 1].mType != ASMIT_LDA &&
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mIns[start - 1].mType != ASMIT_TAY &&
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mIns[start - 1].mType != ASMIT_TAX &&
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(mIns[start - 1].mMode == ASMIM_IMMEDIATE || mIns[start - 1].mMode == ASMIM_IMPLIED))
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start--;
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if (start > 0 && mIns[start - 1].mType == ASMIT_LDA && mIns[start - 1].mMode == ASMIM_ZERO_PAGE)
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{
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@ -35306,6 +35433,7 @@ bool NativeCodeBasicBlock::PeepHoleOptimizer(NativeCodeProcedure* proc, int pass
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mIns[i + 0].mType = ASMIT_LSR;
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progress = true;
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}
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#if 1
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else if (
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mIns[i + 0].mType == ASMIT_AND && mIns[i + 0].mMode == ASMIM_IMMEDIATE &&
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mIns[i + 1].mType == ASMIT_LSR && mIns[i + 1].mMode == ASMIM_IMPLIED &&
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@ -35324,6 +35452,7 @@ bool NativeCodeBasicBlock::PeepHoleOptimizer(NativeCodeProcedure* proc, int pass
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mIns[i + 2].mType = ASMIT_NOP; mIns[i + 2].mMode = ASMIM_IMPLIED;
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progress = true;
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}
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#endif
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else if (
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mIns[i + 0].IsShift() && mIns[i + 0].mMode == ASMIM_ZERO_PAGE &&
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!mIns[i + 1].ReferencesAccu() && (mIns[i + 1].mMode != ASMIM_ZERO_PAGE || mIns[i + 1].mAddress != mIns[i + 0].mAddress) &&
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