Move zero page shift up to previous store
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parent
02a2874a19
commit
65b9c58504
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@ -0,0 +1,11 @@
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mkdir r:\oscar64
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mkdir r:\oscar64\bin
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mkdir r:\oscar64\include
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xcopy /y bin\oscar64.exe r:\oscar64\bin
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xcopy /y /e include r:\oscar64\include
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tar -caf r:\oscar64.zip r:\oscar64
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@ -33581,6 +33581,55 @@ bool NativeCodeBasicBlock::MoveLDSTXOutOfRange(int at)
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return false;
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}
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bool NativeCodeBasicBlock::MoveShiftZeroPageUp(int at)
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{
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int j = at - 1;
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while (j > 0)
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{
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if (mIns[j].mType == ASMIT_STA && mIns[j].mMode == ASMIM_ZERO_PAGE && mIns[j].mAddress == mIns[at].mAddress)
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{
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if (mIns[j].mLive & LIVE_CPU_REG_A)
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{
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if (mIns[j + 1].mType == ASMIT_TAY || mIns[j + 1].mType == ASMIT_TAX)
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{
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if (mIns[j + 1].mLive & LIVE_CPU_REG_A)
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return false;
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NativeCodeInstruction ins(mIns[j + 1]);
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ins.mLive |= LIVE_CPU_REG_A;
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mIns.Remove(j + 1);
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mIns.Insert(j, ins);
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mIns[j + 1].mLive |= ins.mLive;
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j++;
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}
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else
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return false;
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}
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NativeCodeInstruction sins(mIns[at]);
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mIns.Remove(at);
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sins.mMode = ASMIM_IMPLIED;
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sins.mLive |= LIVE_CPU_REG_A;
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mIns.Insert(j, sins);
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mIns[j].mLive |= mIns[j + 1].mLive;
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if (sins.mLive & LIVE_CPU_REG_C)
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{
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for (int i = j; j < at; j++)
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mIns[i].mLive |= LIVE_CPU_REG_C;
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}
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return true;
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}
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if (mIns[j].ReferencesCarry())
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return false;
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if (mIns[j].ReferencesZeroPage(mIns[at].mAddress))
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return false;
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j--;
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}
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return false;
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}
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bool NativeCodeBasicBlock::MoveLoadShiftStoreUp(int at)
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{
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int j = at - 1;
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@ -41997,7 +42046,18 @@ bool NativeCodeBasicBlock::PeepHoleOptimizerShuffle(int pass)
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CheckLive();
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#endif
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#if 1
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for (int i = 0; i < mIns.Size(); i++)
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{
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if (mIns[i].IsShift() && mIns[i].mMode == ASMIM_ZERO_PAGE)
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{
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if (MoveShiftZeroPageUp(i))
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changed = true;
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}
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}
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CheckLive();
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#endif
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#if 1
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// move simple add down to consumer
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@ -44444,7 +44504,7 @@ bool NativeCodeBasicBlock::PeepHoleOptimizerIterate3(int i, int pass)
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else if (
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mIns[i + 0].mType == ASMIT_TAX &&
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mIns[i + 1].mType == ASMIT_LDA && mIns[i + 1].mMode == ASMIM_ABSOLUTE_X &&
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mIns[i + 2].mType == ASMIT_TAX && !(mIns[i + 2].mLive & LIVE_CPU_REG_Y))
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mIns[i + 2].mType == ASMIT_TAX && !(mIns[i + 2].mLive & (LIVE_CPU_REG_Y | LIVE_CPU_REG_A)))
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{
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mIns[i + 0].mType = ASMIT_TAY; mIns[i + 0].mLive |= LIVE_CPU_REG_Y;
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mIns[i + 1].mType = ASMIT_LDX; mIns[i + 1].mMode = ASMIM_ABSOLUTE_Y; mIns[i + 1].mLive |= LIVE_CPU_REG_X;
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@ -44454,7 +44514,7 @@ bool NativeCodeBasicBlock::PeepHoleOptimizerIterate3(int i, int pass)
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else if (
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mIns[i + 0].mType == ASMIT_TAY &&
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mIns[i + 1].mType == ASMIT_LDA && mIns[i + 1].mMode == ASMIM_ABSOLUTE_Y &&
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mIns[i + 2].mType == ASMIT_TAY && !(mIns[i + 2].mLive & LIVE_CPU_REG_X))
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mIns[i + 2].mType == ASMIT_TAY && !(mIns[i + 2].mLive & (LIVE_CPU_REG_X | LIVE_CPU_REG_A)))
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{
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mIns[i + 0].mType = ASMIT_TAX; mIns[i + 0].mLive |= LIVE_CPU_REG_X;
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mIns[i + 1].mType = ASMIT_LDY; mIns[i + 1].mMode = ASMIM_ABSOLUTE_X; mIns[i + 1].mLive |= LIVE_CPU_REG_Y;
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@ -456,6 +456,7 @@ public:
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bool MoveLoadShiftRotateUp(int at);
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bool MoveLoadShiftStoreUp(int at);
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bool MoveTYADCStoreDown(int at);
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bool MoveShiftZeroPageUp(int at);
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bool MoveLDSTXOutOfRange(int at);
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