Fix self destruct of load store forwarding dict

This commit is contained in:
drmortalwombat 2022-11-30 22:47:13 +01:00
parent ec31b845b8
commit 9c6b745993
2 changed files with 25 additions and 2 deletions

View File

@ -8525,7 +8525,7 @@ bool InterCodeBasicBlock::LoadStoreForwarding(const GrowingInstructionPtrArray&
} }
mLoadStoreInstructions.SetSize(k); mLoadStoreInstructions.SetSize(k);
if (nins) if (nins && t >= 0)
{ {
// Check self destruction of source operaand // Check self destruction of source operaand
int l = 0; int l = 0;

View File

@ -19370,6 +19370,7 @@ bool NativeCodeBasicBlock::BackwardReplaceZeroPage(int at, int from, int to, boo
if (at == mIns.Size()) if (at == mIns.Size())
mExitRequiredRegs += to; mExitRequiredRegs += to;
bool done = false;
while (at > 0) while (at > 0)
{ {
at--; at--;
@ -19378,9 +19379,12 @@ bool NativeCodeBasicBlock::BackwardReplaceZeroPage(int at, int from, int to, boo
mIns[at].mAddress = to; mIns[at].mAddress = to;
changed = true; changed = true;
if (mIns[at].mType == ASMIT_STA || mIns[at].mType == ASMIT_STX || mIns[at].mType == ASMIT_STY) if (mIns[at].mType == ASMIT_STA || mIns[at].mType == ASMIT_STX || mIns[at].mType == ASMIT_STY)
{
done = true;
break; break;
} }
} }
}
mEntryRequiredRegs += to; mEntryRequiredRegs += to;
@ -19402,7 +19406,7 @@ bool NativeCodeBasicBlock::BackwardReplaceZeroPage(int at, int from, int to, boo
if (mEntryBlocks[0]->BackwardReplaceZeroPage(mEntryBlocks[0]->mIns.Size(), from, to, false)) if (mEntryBlocks[0]->BackwardReplaceZeroPage(mEntryBlocks[0]->mIns.Size(), from, to, false))
changed = true; changed = true;
} }
else if (at == 0) else if (!done)
{ {
if (mEntryBlocks.Size() == 1) if (mEntryBlocks.Size() == 1)
{ {
@ -28524,6 +28528,25 @@ bool NativeCodeBasicBlock::PeepHoleOptimizer(NativeCodeProcedure* proc, int pass
progress = true; progress = true;
} }
#endif #endif
#if 1
else if (
mIns[i + 0].mType == ASMIT_STA && mIns[i + 0].mMode == ASMIM_ZERO_PAGE && !(mIns[i + 0].mLive & LIVE_CPU_REG_A) &&
!mIns[i + 1].ReferencesZeroPage(mIns[i + 0].mAddress) && !mIns[i + 1].ChangesCarry() &&
!mIns[i + 2].ReferencesZeroPage(mIns[i + 0].mAddress) && !mIns[i + 2].ChangesCarry() &&
mIns[i + 3].IsShift() && mIns[i + 3].SameEffectiveAddress(mIns[i + 0]))
{
AsmInsType type = mIns[i + 3].mType;
mIns[i + 3] = mIns[i + 2];
mIns[i + 2] = mIns[i + 1];
mIns[i + 1] = mIns[i + 0];
mIns[i + 0] = NativeCodeInstruction(type);
mIns[i + 1].mLive |= LIVE_CPU_REG_C;
mIns[i + 2].mLive |= LIVE_CPU_REG_C;
mIns[i + 3].mLive |= LIVE_CPU_REG_C;
progress = true;
}
#endif
else if ( else if (
mIns[i + 0].ChangesAccuAndFlag() && mIns[i + 0].ChangesAccuAndFlag() &&
mIns[i + 1].mType == ASMIT_STA && mIns[i + 1].mType == ASMIT_STA &&