Add runtime assembler functions to c64 library
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#ifndef C64_ASM_6502_H
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#define C64_ASM_6502_H
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#include "types.h"
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enum AsmIns
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{
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// Implied
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ASM_BRK = 0x00,
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ASM_RTI = 0x40,
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ASM_RTS = 0x60,
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ASM_PHP = 0x08,
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ASM_CLC = 0x18,
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ASM_PLP = 0x28,
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ASM_SEC = 0x38,
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ASM_PHA = 0x48,
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ASM_CLI = 0x58,
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ASM_PLA = 0x68,
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ASM_SEI = 0x78,
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ASM_DEY = 0x88,
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ASM_TYA = 0x98,
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ASM_TAY = 0xa8,
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ASM_CLV = 0xb8,
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ASM_INY = 0xc8,
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ASM_CLD = 0xd8,
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ASM_INX = 0xe8,
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ASM_SED = 0xf8,
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ASM_TXA = 0x8a,
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ASM_TXS = 0x9a,
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ASM_TAX = 0xaa,
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ASM_TSX = 0xba,
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ASM_DEX = 0xca,
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ASM_NOP = 0xea,
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// Relative
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ASM_BPL = 0x10,
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ASM_BMI = 0x30,
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ASM_BVC = 0x50,
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ASM_BVS = 0x70,
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ASM_BCC = 0x90,
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ASM_BCS = 0xb0,
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ASM_BNE = 0xd0,
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ASM_BEQ = 0xf0,
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// Generic address
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ASM_ORA = 0x01,
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ASM_AND = 0x21,
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ASM_EOR = 0x41,
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ASM_ADC = 0x61,
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ASM_STA = 0x81,
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ASM_LDA = 0xa1,
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ASM_CMP = 0xc1,
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ASM_SBC = 0xe1,
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ASM_STY = 0x80,
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ASM_LDY = 0xa0,
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ASM_CPY = 0xc0,
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ASM_CPX = 0xe0,
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ASM_ASL = 0x02,
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ASM_ROL = 0x22,
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ASM_LSR = 0x42,
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ASM_ROR = 0x62,
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ASM_STX = 0x82,
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ASM_LDX = 0xa2,
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ASM_DEC = 0xc2,
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ASM_INC = 0xe2,
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// Limited Generic
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ASM_BIT = 0x20,
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// Jump
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ASM_JMP = 0x4c,
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ASM_JSR = 0x2c
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};
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inline void asm_np(byte ** ip, AsmIns ins)
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{
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(*ip)[0] = ins & 0xff;
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(*ip)++;
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}
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inline void asm_zp(byte ** ip, AsmIns ins, byte addr)
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{
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(*ip)[0] = (ins & 0xff) | 0x04;
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(*ip)[1] = addr;
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(*ip) += 2;
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}
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inline void asm_rl(byte ** ip, AsmIns ins, byte addr)
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{
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(*ip)[0] = ins & 0xff;
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(*ip)[1] = addr;
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(*ip) += 2;
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}
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inline void asm_im(byte ** ip, AsmIns ins, byte value)
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{
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(*ip)[0] = (ins & 0xff) | ((ins & 0x01) << 3);
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(*ip)[1] = value;
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(*ip) += 2;
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}
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inline void asm_zx(byte ** ip, AsmIns ins, byte addr)
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{
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(*ip)[0] = (ins & 0xff) | 0x05;
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(*ip)[1] = addr;
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(*ip) += 2;
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}
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inline void asm_zy(byte ** ip, AsmIns ins, byte addr)
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{
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(*ip)[0] = (ins & 0xff) | 0x05;
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(*ip)[1] = addr;
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(*ip) += 2;
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}
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inline void asm_ab(byte ** ip, AsmIns ins, unsigned addr)
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{
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(*ip)[0] = (ins & 0xff) ^ 0x0c;
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(*ip)[1] = addr & 0xff;
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(*ip)[2] = addr >> 8;
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(*ip) += 3;
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}
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inline void asm_in(byte ** ip, AsmIns ins, unsigned addr)
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{
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(*ip)[0] = (ins & 0xff) ^ 0x2c;
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(*ip)[1] = addr & 0xff;
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(*ip)[2] = addr >> 8;
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(*ip) += 3;
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}
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inline void asm_ax(byte ** ip, AsmIns ins, unsigned addr)
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{
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(*ip)[0] = (ins & 0xff) | 0x1c;
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(*ip)[1] = addr & 0xff;
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(*ip)[2] = addr >> 8;
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(*ip) += 3;
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}
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inline void asm_ay(byte ** ip, AsmIns ins, unsigned addr)
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{
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(*ip)[0] = (ins & 0xff) | 0x18;
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(*ip)[1] = addr & 0xff;
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(*ip)[2] = addr >> 8;
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(*ip) += 3;
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}
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inline void asm_ix(byte ** ip, AsmIns ins, byte addr)
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{
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(*ip)[0] = (ins & 0xff) | 0x00;
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(*ip)[1] = addr;
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(*ip) += 2;
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}
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inline void asm_iy(byte ** ip, AsmIns ins, byte addr)
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{
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(*ip)[0] = (ins & 0xff) | 0x01;
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(*ip)[1] = addr;
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(*ip) += 2;
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}
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#endif
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@ -1560,6 +1560,27 @@ bool NativeCodeInstruction::ValueForwarding(NativeRegisterDataSet& data, AsmInsT
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int c = t >= 256;
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if (t && !data.mRegs[CPU_REG_C].mValue)
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carryop = ASMIT_SEC;
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else if (!t && data.mRegs[CPU_REG_C].mValue)
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carryop = ASMIT_CLC;
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changed = true;
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}
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else if (mMode == ASMIM_IMMEDIATE_ADDRESS && data.mRegs[CPU_REG_A].mMode == NRDM_IMMEDIATE_ADDRESS && mLinkerObject == data.mRegs[CPU_REG_A].mLinkerObject)
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{
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int t;
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if (mFlags & NCIF_LOWER)
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t = (mAddress ^ 0xffff) + data.mRegs[CPU_REG_A].mValue + data.mRegs[CPU_REG_C].mValue;
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else
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t = ((mAddress ^ 0xffff) >> 8) + data.mRegs[CPU_REG_A].mValue + data.mRegs[CPU_REG_C].mValue;
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mType = ASMIT_LDA;
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mMode = ASMIM_IMMEDIATE;
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mAddress = t & 0xff;
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int c = t >= 256;
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if (t && !data.mRegs[CPU_REG_C].mValue)
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carryop = ASMIT_SEC;
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else if (!t && data.mRegs[CPU_REG_C].mValue)
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