diff --git a/include/cx16/vera.c b/include/cx16/vera.c index ba045b6..5e0762f 100644 --- a/include/cx16/vera.c +++ b/include/cx16/vera.c @@ -68,12 +68,12 @@ void vram_fill(unsigned long addr, char data, unsigned size) } -void vera_spr_set(char spr, unsigned addr32, bool mode8, char w, char h, char z, char pal) +void vera_spr_set(char spr, unsigned addr32, VERASpriteMode mode8, VERASpriteSize w, VERASpriteSize h, VERASpritePriority z, char pal) { __assume(spr < 128); vram_addr(0x1fc00UL + spr * 8); - vram_putw(addr32 | (mode8 ? 0x80 : 0x00)); + vram_putw(addr32 | (mode8 ? 0x8000 : 0x0000)); vram_putw(0); vram_putw(0); vram_put(z << 2); @@ -88,3 +88,14 @@ void vera_spr_move(char spr, int x, int y) vram_putw(x); vram_putw(y); } + +void vera_spr_image(char spr, unsigned addr32) +{ + __assume(spr < 128); + + vram_addr(0x1fc00UL + spr * 8); + vram_put(addr32 & 0xff); + vera.addrh &= 0x0f; + char b = vram_get() & 0x80; + vram_put((addr32 >> 8) | b); +} diff --git a/include/cx16/vera.h b/include/cx16/vera.h index 109b501..138eab9 100644 --- a/include/cx16/vera.h +++ b/include/cx16/vera.h @@ -18,6 +18,37 @@ #define VERA_IRQ_LINE 0x02 #define VERA_IRQ_VSYNC 0x01 +#define VERA_DCVIDEO_MODE_OFF 0x00 +#define VERA_DCVIDEO_MODE_VGA 0x01 +#define VERA_DCVIDEO_MODE_NTSC 0x02 +#define VERA_DCVIDEO_MODE_RGBI 0x03 + +#define VERA_DCVIDEO_NCHROMA 0x04 +#define VERA_DCVIDEO_LAYER0 0x10 +#define VERA_DCVIDEO_LAYER1 0x20 +#define VERA_DCVIDEO_SPRITES 0x40 + +#define VERA_LAYER_DEPTH_1 0x00 +#define VERA_LAYER_DEPTH_2 0x01 +#define VERA_LAYER_DEPTH_4 0x02 +#define VERA_LAYER_DEPTH_8 0x03 + +#define VERA_LAYER_BITMAP 0x04 +#define VERA_LAYER_T256C 0x08 +#define VERA_LAYER_WIDTH_32 0x00 +#define VERA_LAYER_WIDTH_64 0x10 +#define VERA_LAYER_WIDTH_128 0x20 +#define VERA_LAYER_WIDTH_256 0x30 +#define VERA_LAYER_HEIGHT_32 0x00 +#define VERA_LAYER_HEIGHT_64 0x40 +#define VERA_LAYER_HEIGHT_128 0x80 +#define VERA_LAYER_HEIGHT_256 0xc0 + +#define VERA_TILE_WIDTH_8 0x00 +#define VERA_TILE_WIDTH_16 0x01 +#define VERA_TILE_HEIGHT_8 0x00 +#define VERA_TILE_HEIGHT_16 0x02 + struct VERA { @@ -55,6 +86,28 @@ struct VERA volatile byte spictrl; }; +enum VERASpriteMode +{ + VSPRMODE_4, + VSPRMODE_8 +}; + +enum VERASpriteSize +{ + VSPRSZIZE_8, + VSPRSZIZE_16, + VSPRSZIZE_32, + VSPRSZIZE_64 +}; + +enum VERASpritePriority +{ + VSPRPRI_OFF, + VSPRPRI_BACK, + VSPRPRI_MIDDLE, + VSPRPRI_FRONT +}; + #define vera (*(VERA *)0x9f20) inline void vram_addr(unsigned long addr); @@ -75,10 +128,12 @@ void vram_getn(unsigned long addr, char * data, unsigned size); void vram_fill(unsigned long addr, char data, unsigned size); -void vera_spr_set(char spr, unsigned addr32, bool mode8, char w, char h, char z, char pal); +void vera_spr_set(char spr, unsigned addr32, VERASpriteMode mode8, VERASpriteSize w, VERASpriteSize h, VERASpritePriority z, char pal); void vera_spr_move(char spr, int x, int y); +void vera_spr_image(char spr, unsigned addr32); + #pragma compile("vera.c") #endif diff --git a/oscar64/NativeCodeGenerator.cpp b/oscar64/NativeCodeGenerator.cpp index 2d70e2d..6d0ff28 100644 --- a/oscar64/NativeCodeGenerator.cpp +++ b/oscar64/NativeCodeGenerator.cpp @@ -22587,6 +22587,17 @@ bool NativeCodeBasicBlock::JoinTAXARange(int from, int to) } } + if (to + 2 < mIns.Size() && mIns[to + 2].mType == ASMIT_STA && HasAsmInstructionMode(ASMIT_STX, mIns[to + 2].mMode) && !(mIns[to + 2].mLive & LIVE_CPU_REG_X) && !ReferencesXReg(from + 1, to)) + { + if (mIns[to + 1].mType == ASMIT_ORA && mIns[to + 1].mMode == ASMIM_IMMEDIATE) + { + mIns[to + 0].mType = ASMIT_NOP; mIns[to + 0].mMode == ASMIM_IMPLIED; + mIns[to + 1].mType = ASMIT_NOP; mIns[to + 1].mMode == ASMIM_IMPLIED; + mIns[to + 2].mType = ASMIT_STX; + mIns.Insert(from, NativeCodeInstruction(mIns[to + 0].mIns, ASMIT_ORA, ASMIM_IMMEDIATE, mIns[to + 1].mAddress)); + return true; + } + } int i = from + 1; while (i < to && (mIns[i].mType == ASMIT_LDA || mIns[i].mType == ASMIT_STA) && (mIns[i].mMode == ASMIM_IMMEDIATE || mIns[i].mMode == ASMIM_IMMEDIATE_ADDRESS || mIns[i].mMode == ASMIM_ABSOLUTE || mIns[i].mMode == ASMIM_ZERO_PAGE)) @@ -25313,6 +25324,43 @@ bool NativeCodeBasicBlock::MoveLoadStoreUp(int at) return false; } +// Assume [at ] = SHIFT +// Assume [at + 1] = ORA + +bool NativeCodeBasicBlock::FoldShiftORAIntoLoadImmUp(int at) +{ + int ora = mIns[at + 1].mAddress; + int i = at; + + while (i >= 0) + { + if (mIns[i].mType == ASMIT_LDA && mIns[i].mMode == ASMIM_IMMEDIATE) + { + mIns[i].mAddress |= ora; + mIns[at + 1].mType = ASMIT_NOP; + mIns[at + 1].mMode = ASMIM_IMPLIED; + return true; + } + else if ((mIns[i].mType == ASMIT_ROL || mIns[i].mType == ASMIT_ASL) && mIns[i].mMode == ASMIM_IMPLIED) + { + if ((mIns[i].mLive & LIVE_CPU_REG_C) || (ora & 0x01)) + return false; + ora >>= 1; + } + else if ((mIns[i].mType == ASMIT_ROR || mIns[i].mType == ASMIT_LSR) && mIns[i].mMode == ASMIM_IMPLIED) + { + if ((mIns[i].mLive & LIVE_CPU_REG_C) || (ora & 0x80)) + return false; + ora <<= 1; + } + else if (mIns[i].ReferencesAccu()) + return false; + i--; + } + + return false; +} + bool NativeCodeBasicBlock::CombineImmediateADCUp(int at) { int addr = mIns[at].mAddress; @@ -31499,6 +31547,20 @@ bool NativeCodeBasicBlock::PeepHoleOptimizer(NativeCodeProcedure* proc, int pass #endif +#if 1 + // move ORA #imm up a shift chain to an LDA #imm + + for (int i = 1; i + 1 < mIns.Size(); i++) + { + if (mIns[i].IsShift() && mIns[i].mMode == ASMIM_IMPLIED && mIns[i + 1].mType == ASMIT_ORA && mIns[i + 1].mMode == ASMIM_IMMEDIATE && !(mIns[i + 1].mLive & LIVE_CPU_REG_Z)) + { + if (FoldShiftORAIntoLoadImmUp(i)) + changed = true; + } + } + CheckLive(); + +#endif #if 1 diff --git a/oscar64/NativeCodeGenerator.h b/oscar64/NativeCodeGenerator.h index 5e51556..1a9209f 100644 --- a/oscar64/NativeCodeGenerator.h +++ b/oscar64/NativeCodeGenerator.h @@ -397,6 +397,7 @@ public: bool CombineImmediateADCUp(int at); bool CombineImmediateADCUpX(int at); bool MoveTXADCDown(int at); + bool FoldShiftORAIntoLoadImmUp(int at); bool MoveZeroPageCrossBlockUp(int at, const NativeCodeInstruction & lins, const NativeCodeInstruction & sins); bool ShortcutCrossBlockMoves(NativeCodeProcedure* proc);