Fix carray propagation in 16bit subtract with low byte const
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1805e311b8
commit
eafe13e557
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@ -2113,8 +2113,8 @@ bool NativeCodeInstruction::BitFieldForwarding(NativeRegisterDataSet& data, AsmI
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(data.mRegs[mAddress].mMask & data.mRegs[mAddress].mValue) &
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(data.mRegs[CPU_REG_A].mMask & data.mRegs[CPU_REG_A].mValue);
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data.mRegs[CPU_REG_A].mMask = ones | zeros;
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data.mRegs[CPU_REG_A].mValue = ones;
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data.mRegs[CPU_REG_A].mMask = (ones | zeros) & 0xff;
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data.mRegs[CPU_REG_A].mValue = ones & 0xff;
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if (data.mRegs[CPU_REG_A].mMask == 0xff)
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{
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@ -2130,8 +2130,8 @@ bool NativeCodeInstruction::BitFieldForwarding(NativeRegisterDataSet& data, AsmI
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int ones = mAddress & (data.mRegs[CPU_REG_A].mMask & data.mRegs[CPU_REG_A].mValue);
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data.mRegs[CPU_REG_A].mMask = ones | zeros;
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data.mRegs[CPU_REG_A].mValue = ones;
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data.mRegs[CPU_REG_A].mMask = (ones | zeros) & 0xff;
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data.mRegs[CPU_REG_A].mValue = ones & 0xff;
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if (data.mRegs[CPU_REG_A].mMask == 0xff)
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{
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@ -2156,8 +2156,8 @@ bool NativeCodeInstruction::BitFieldForwarding(NativeRegisterDataSet& data, AsmI
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(data.mRegs[mAddress].mMask & ~data.mRegs[mAddress].mValue) &
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(data.mRegs[CPU_REG_A].mMask & ~data.mRegs[CPU_REG_A].mValue);
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data.mRegs[CPU_REG_A].mMask = ones | zeros;
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data.mRegs[CPU_REG_A].mValue = ones;
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data.mRegs[CPU_REG_A].mMask = (ones | zeros) & 0xff;
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data.mRegs[CPU_REG_A].mValue = ones & 0xff;
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if (data.mRegs[CPU_REG_A].mMask == 0xff)
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{
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@ -2173,8 +2173,8 @@ bool NativeCodeInstruction::BitFieldForwarding(NativeRegisterDataSet& data, AsmI
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int zeros = ~ mAddress & (data.mRegs[CPU_REG_A].mMask & ~data.mRegs[CPU_REG_A].mValue);
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data.mRegs[CPU_REG_A].mMask = ones | zeros;
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data.mRegs[CPU_REG_A].mValue = ones;
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data.mRegs[CPU_REG_A].mMask = (ones | zeros) & 0xff;
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data.mRegs[CPU_REG_A].mValue = ones & 0xff;
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if (data.mRegs[CPU_REG_A].mMask == 0xff)
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{
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@ -2303,7 +2303,7 @@ bool NativeCodeInstruction::BitFieldForwarding(NativeRegisterDataSet& data, AsmI
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{
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int mask = data.mRegs[iaddr].mMask, value = data.mRegs[iaddr].mValue;
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data.mRegs[iaddr].mMask = (mask >> 1) & 0xff;
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data.mRegs[iaddr].mMask = (mask >> 1) & 0x7f;
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data.mRegs[iaddr].mValue = (value >> 1) & 0x7f;
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if (data.mRegs[CPU_REG_C].mMask & 1)
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@ -2334,6 +2334,13 @@ bool NativeCodeInstruction::BitFieldForwarding(NativeRegisterDataSet& data, AsmI
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break;
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}
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#if _DEBUG
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for (int i = 0; i < NUM_REGS; i++)
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{
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assert(!(data.mRegs[i].mMask & 0xff00));
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}
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#endif
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return changed;
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}
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@ -2510,18 +2517,34 @@ bool NativeCodeInstruction::ValueForwarding(NativeRegisterDataSet& data, AsmInsT
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break;
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case ASMIT_ADC:
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if (data.mRegs[CPU_REG_C].mMode == NRDM_IMMEDIATE && data.mRegs[CPU_REG_C].mValue == 0)
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if (data.mRegs[CPU_REG_C].mMode == NRDM_IMMEDIATE)
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{
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if (mMode == ASMIM_IMMEDIATE && mAddress == 0)
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if (mMode == ASMIM_IMMEDIATE && mAddress == 0 && data.mRegs[CPU_REG_C].mValue == 0)
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{
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mType = ASMIT_ORA;
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changed = true;
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}
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else if (data.mRegs[CPU_REG_A].mMode == NRDM_IMMEDIATE && data.mRegs[CPU_REG_A].mValue == 0)
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else if (data.mRegs[CPU_REG_A].mMode == NRDM_IMMEDIATE && data.mRegs[CPU_REG_A].mValue == 0 && data.mRegs[CPU_REG_C].mValue == 0)
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{
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mType = ASMIT_LDA;
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changed = true;
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}
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else if (mMode == ASMIM_IMMEDIATE && data.mRegs[CPU_REG_A].mMode == NRDM_IMMEDIATE)
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{
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int t = mAddress + data.mRegs[CPU_REG_A].mValue + data.mRegs[CPU_REG_C].mValue;
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mType = ASMIT_LDA;
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mAddress = t & 0xff;
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int c = t >= 256;
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if (c && !data.mRegs[CPU_REG_C].mValue)
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carryop = ASMIT_SEC;
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else if (!c && data.mRegs[CPU_REG_C].mValue)
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carryop = ASMIT_CLC;
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changed = true;
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}
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}
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data.mRegs[CPU_REG_A].Reset();
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@ -2546,9 +2569,9 @@ bool NativeCodeInstruction::ValueForwarding(NativeRegisterDataSet& data, AsmInsT
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int c = t >= 256;
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if (t && !data.mRegs[CPU_REG_C].mValue)
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if (c && !data.mRegs[CPU_REG_C].mValue)
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carryop = ASMIT_SEC;
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else if (!t && data.mRegs[CPU_REG_C].mValue)
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else if (!c && data.mRegs[CPU_REG_C].mValue)
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carryop = ASMIT_CLC;
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changed = true;
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@ -2567,9 +2590,9 @@ bool NativeCodeInstruction::ValueForwarding(NativeRegisterDataSet& data, AsmInsT
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int c = t >= 256;
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if (t && !data.mRegs[CPU_REG_C].mValue)
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if (c && !data.mRegs[CPU_REG_C].mValue)
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carryop = ASMIT_SEC;
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else if (!t && data.mRegs[CPU_REG_C].mValue)
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else if (!c && data.mRegs[CPU_REG_C].mValue)
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carryop = ASMIT_CLC;
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changed = true;
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@ -3205,6 +3228,78 @@ bool NativeCodeInstruction::ValueForwarding(NativeRegisterDataSet& data, AsmInsT
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if (ChangesAddress())
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data.ResetIndirect(mAddress);
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}
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else if (mMode == ASMIM_ABSOLUTE_X)
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{
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if (mType == ASMIT_LDA)
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{
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if (!(mFlags & NCIF_VOLATILE))
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{
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if (data.mRegs[CPU_REG_A].mMode == NRDM_ABSOLUTE_X && data.mRegs[CPU_REG_A].mLinkerObject == mLinkerObject && data.mRegs[CPU_REG_A].mValue == mAddress)
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{
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if (mLive & LIVE_CPU_REG_Z)
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{
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mType = ASMIT_ORA;
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mMode = ASMIM_IMMEDIATE;
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mAddress = 0;
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}
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else
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{
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mType = ASMIT_NOP;
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mMode = ASMIM_IMPLIED;
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}
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changed = true;
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}
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else
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{
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data.mRegs[CPU_REG_A].mMode = NRDM_ABSOLUTE_X;
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data.mRegs[CPU_REG_A].mLinkerObject = mLinkerObject;
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data.mRegs[CPU_REG_A].mValue = mAddress;
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data.mRegs[CPU_REG_A].mFlags = mFlags;
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}
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}
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else
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data.mRegs[CPU_REG_A].Reset();
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}
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if (ChangesAddress())
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data.ResetIndirect(mAddress);
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}
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else if (mMode == ASMIM_ABSOLUTE_Y)
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{
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if (mType == ASMIT_LDA)
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{
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if (!(mFlags & NCIF_VOLATILE))
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{
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if (data.mRegs[CPU_REG_A].mMode == NRDM_ABSOLUTE_Y && data.mRegs[CPU_REG_A].mLinkerObject == mLinkerObject && data.mRegs[CPU_REG_A].mValue == mAddress)
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{
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if (mLive & LIVE_CPU_REG_Z)
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{
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mType = ASMIT_ORA;
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mMode = ASMIM_IMMEDIATE;
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mAddress = 0;
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}
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else
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{
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mType = ASMIT_NOP;
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mMode = ASMIM_IMPLIED;
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}
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changed = true;
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}
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else
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{
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data.mRegs[CPU_REG_A].mMode = NRDM_ABSOLUTE_Y;
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data.mRegs[CPU_REG_A].mLinkerObject = mLinkerObject;
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data.mRegs[CPU_REG_A].mValue = mAddress;
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data.mRegs[CPU_REG_A].mFlags = mFlags;
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}
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}
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else
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data.mRegs[CPU_REG_A].Reset();
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}
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if (ChangesAddress())
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data.ResetIndirect(mAddress);
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}
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else if (mMode == ASMIM_ABSOLUTE)
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{
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switch (mType)
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@ -3289,11 +3384,6 @@ bool NativeCodeInstruction::ValueForwarding(NativeRegisterDataSet& data, AsmInsT
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data.ResetAbsolute(mLinkerObject, mAddress);
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}
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}
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else if (mMode == ASMIM_ABSOLUTE_X || mMode == ASMIM_ABSOLUTE_Y)
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{
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if (ChangesAddress())
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data.ResetAbsolute(mLinkerObject, mAddress);
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}
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return changed;
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}
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@ -14399,6 +14489,7 @@ bool NativeCodeBasicBlock::JoinTailCodeSequences(NativeCodeProcedure* proc, bool
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mTrueJump->mIns.Insert(0, ins);
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mTrueJump->mIns[0].mLive |= LIVE_CPU_REG_C;
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mIns.Remove(mIns.Size() - 1);
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mExitRequiredRegs += CPU_REG_A;
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mTrueJump->mEntryRequiredRegs += CPU_REG_A;
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mTrueJump->CheckLive();
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changed = true;
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@ -14408,6 +14499,7 @@ bool NativeCodeBasicBlock::JoinTailCodeSequences(NativeCodeProcedure* proc, bool
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mFalseJump->mIns.Insert(0, ins);
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mFalseJump->mIns[0].mLive |= LIVE_CPU_REG_C;
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mIns.Remove(mIns.Size() - 1);
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mExitRequiredRegs += CPU_REG_A;
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mFalseJump->mEntryRequiredRegs += CPU_REG_A;
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mFalseJump->CheckLive();
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changed = true;
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@ -14420,25 +14512,53 @@ bool NativeCodeBasicBlock::JoinTailCodeSequences(NativeCodeProcedure* proc, bool
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int ns = mIns.Size();
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const NativeCodeInstruction& ins(mIns[ns - 2]);
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if (ins.mType == ASMIT_STA && ins.mMode == ASMIM_ZERO_PAGE && mTrueJump && mFalseJump && !mIns[ns-1].ChangesAccu() && !mIns[ns-1].UsesZeroPage(ins.mAddress) && mTrueJump->mEntryRequiredRegs.Size() && mFalseJump->mEntryRequiredRegs.Size())
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if (ins.mType == ASMIT_STA && ins.mMode == ASMIM_ZERO_PAGE && mTrueJump && mFalseJump && !mIns[ns-1].UsesZeroPage(ins.mAddress) && mTrueJump->mEntryRequiredRegs.Size() && mFalseJump->mEntryRequiredRegs.Size())
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{
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if (mTrueJump->mEntryRequiredRegs[ins.mAddress] && !mFalseJump->mEntryRequiredRegs[ins.mAddress] && mTrueJump->mEntryBlocks.Size() == 1)
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if (!mIns[ns - 1].ChangesAccu())
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{
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mTrueJump->mIns.Insert(0, ins);
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mTrueJump->mIns[0].mLive |= LIVE_CPU_REG_C;
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mIns.Remove(ns - 2);
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mTrueJump->mEntryRequiredRegs += CPU_REG_A;
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mTrueJump->CheckLive();
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changed = true;
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if (mTrueJump->mEntryRequiredRegs[ins.mAddress] && !mFalseJump->mEntryRequiredRegs[ins.mAddress] && mTrueJump->mEntryBlocks.Size() == 1)
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{
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mTrueJump->mIns.Insert(0, ins);
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mTrueJump->mIns[0].mLive |= LIVE_CPU_REG_C;
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mIns.Remove(ns - 2);
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mTrueJump->mEntryRequiredRegs += CPU_REG_A;
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mTrueJump->CheckLive();
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changed = true;
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}
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else if (mFalseJump->mEntryRequiredRegs[ins.mAddress] && !mTrueJump->mEntryRequiredRegs[ins.mAddress] && mFalseJump->mEntryBlocks.Size() == 1)
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{
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mFalseJump->mIns.Insert(0, ins);
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mFalseJump->mIns[0].mLive |= LIVE_CPU_REG_C;
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mIns.Remove(ns - 2);
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mFalseJump->mEntryRequiredRegs += CPU_REG_A;
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mFalseJump->CheckLive();
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changed = true;
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}
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}
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else if (mFalseJump->mEntryRequiredRegs[ins.mAddress] && !mTrueJump->mEntryRequiredRegs[ins.mAddress] && mFalseJump->mEntryBlocks.Size() == 1)
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else if (ns >= 3 && mIns[ns - 3].mType == ASMIT_LDA && mIns[ns - 3].mMode == ASMIM_ZERO_PAGE && !(mIns[ns - 2].mLive & LIVE_CPU_REG_X))
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{
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mFalseJump->mIns.Insert(0, ins);
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mFalseJump->mIns[0].mLive |= LIVE_CPU_REG_C;
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mIns.Remove(ns - 2);
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mFalseJump->mEntryRequiredRegs += CPU_REG_A;
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mFalseJump->CheckLive();
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changed = true;
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if (mTrueJump->mEntryRequiredRegs[ins.mAddress] && !mFalseJump->mEntryRequiredRegs[ins.mAddress] && mTrueJump->mEntryBlocks.Size() == 1)
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{
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mIns[ns - 3].mType = ASMIT_LDX; mIns[ns - 3].mLive |= LIVE_CPU_REG_X;
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mIns[ns - 2].mType = ASMIT_STX;
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mTrueJump->mIns.Insert(0, ins);
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mTrueJump->mIns[0].mLive |= LIVE_CPU_REG_C;
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mIns.Remove(ns - 2);
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mTrueJump->mEntryRequiredRegs += CPU_REG_X;
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mTrueJump->CheckLive();
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changed = true;
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}
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else if (mFalseJump->mEntryRequiredRegs[ins.mAddress] && !mTrueJump->mEntryRequiredRegs[ins.mAddress] && mFalseJump->mEntryBlocks.Size() == 1)
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{
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mIns[ns - 3].mType = ASMIT_LDX; mIns[ns - 3].mLive |= LIVE_CPU_REG_X;
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mIns[ns - 2].mType = ASMIT_STX;
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mFalseJump->mIns.Insert(0, ins);
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mFalseJump->mIns[0].mLive |= LIVE_CPU_REG_C;
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mIns.Remove(ns - 2);
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mFalseJump->mEntryRequiredRegs += CPU_REG_X;
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mFalseJump->CheckLive();
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changed = true;
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}
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}
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}
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}
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@ -24000,6 +24120,16 @@ bool NativeCodeBasicBlock::PeepHoleOptimizer(NativeCodeProcedure* proc, int pass
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mIns[i + 2].mMode = ASMIM_ABSOLUTE_X;
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progress = true;
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}
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else if (
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mIns[i + 0].mType == ASMIT_LDA && !(mIns[i + 0].mFlags & NCIF_VOLATILE) &&
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mIns[i + 1].mType == ASMIT_STA && !mIns[i + 0].MayBeChangedOnAddress(mIns[i + 1], true) &&
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mIns[i + 2].mType == ASMIT_LDA && mIns[i + 2].SameEffectiveAddress(mIns[i + 0]) && !(mIns[i + 2].mFlags & NCIF_VOLATILE))
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{
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mIns[i + 0].mLive |= mIns[i + 2].mLive;
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mIns[i + 1].mLive |= mIns[i + 2].mLive;
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mIns[i + 2].mType = ASMIT_NOP; mIns[i + 2].mMode = ASMIM_IMPLIED;
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progress = true;
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}
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else if (
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mIns[i + 0].mType == ASMIT_LDA && HasAsmInstructionMode(ASMIT_LDX, mIns[i + 0].mMode) &&
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mIns[i + 1].mType == ASMIT_STA && HasAsmInstructionMode(ASMIT_STX, mIns[i + 1].mMode) &&
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@ -27565,7 +27695,6 @@ void NativeCodeProcedure::Optimize(void)
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ResetVisited();
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bchanged = mEntryBlock->BitFieldForwarding(data);
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} while (bchanged);
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}
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#endif
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@ -27582,6 +27711,7 @@ void NativeCodeProcedure::Optimize(void)
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mEntryBlock->ReplaceFinalZeroPageUse(this);
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}
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#endif
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#if 1
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do
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{
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@ -27891,10 +28021,10 @@ void NativeCodeProcedure::Optimize(void)
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{
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step++;
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changed = true;
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}
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#endif
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cnt++;
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} while (changed);
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