- Fix Radeon offscreen pixmap pitch alignment.
- Remove usleeps from idle and waitavail code, recommended by keithp. - Add a workaround for apparent broken acceleration with Rage 128 and offset alignment with 8-bit acceleration (24-hack and plain 8-bit). - Minor cleanup of setup code.
This commit is contained in:
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8e09afe657
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@ -86,19 +86,14 @@ ATIWaitAvail(int n)
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return;
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return;
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}
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}
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if (is_radeon) {
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if (is_radeon) {
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fifo_size = MMIO_IN32(mmio, RADEON_REG_RBBM_STATUS) &
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do {
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RADEON_RBBM_FIFOCNT_MASK;
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while (fifo_size < n) {
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usleep(1);
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fifo_size = MMIO_IN32(mmio, RADEON_REG_RBBM_STATUS) &
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fifo_size = MMIO_IN32(mmio, RADEON_REG_RBBM_STATUS) &
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RADEON_RBBM_FIFOCNT_MASK;
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RADEON_RBBM_FIFOCNT_MASK;
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}
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} while (fifo_size < n);
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} else {
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} else {
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fifo_size = MMIO_IN32(mmio, R128_REG_GUI_STAT) & 0xfff;
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do {
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while (fifo_size < n) {
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fifo_size = MMIO_IN32(mmio, R128_REG_GUI_STAT) & 0xfff;
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fifo_size = MMIO_IN32(mmio, R128_REG_GUI_STAT) & 0xfff;
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usleep(1);
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} while (fifo_size < n);
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}
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}
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}
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fifo_size -= n;
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fifo_size -= n;
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}
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}
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@ -112,7 +107,7 @@ RadeonWaitIdle(void)
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while ((MMIO_IN32(mmio, RADEON_REG_RBBM_STATUS) &
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while ((MMIO_IN32(mmio, RADEON_REG_RBBM_STATUS) &
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RADEON_RBBM_ACTIVE) != 0)
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RADEON_RBBM_ACTIVE) != 0)
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usleep(1);
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;
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/* Flush pixel cache */
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/* Flush pixel cache */
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temp = MMIO_IN32(mmio, RADEON_REG_RB2D_DSTCACHE_CTLSTAT);
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temp = MMIO_IN32(mmio, RADEON_REG_RB2D_DSTCACHE_CTLSTAT);
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@ -121,7 +116,7 @@ RadeonWaitIdle(void)
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while ((MMIO_IN32(mmio, RADEON_REG_RB2D_DSTCACHE_CTLSTAT) &
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while ((MMIO_IN32(mmio, RADEON_REG_RB2D_DSTCACHE_CTLSTAT) &
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RADEON_RB2D_DC_BUSY) != 0)
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RADEON_RB2D_DC_BUSY) != 0)
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usleep(1);
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;
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}
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}
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static void
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static void
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@ -159,9 +154,9 @@ ATIWaitIdle(void)
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}
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}
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static Bool
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static Bool
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ATISetup(ScreenPtr pScreen, PixmapPtr pDst, PixmapPtr pSrc)
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ATISetup(PixmapPtr pDst, PixmapPtr pSrc)
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{
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{
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KdScreenPriv(pScreen);
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KdScreenPriv(pDst->drawable.pScreen);
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ATICardInfo(pScreenPriv);
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ATICardInfo(pScreenPriv);
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int dst_offset, dst_pitch, src_offset = 0, src_pitch = 0;
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int dst_offset, dst_pitch, src_offset = 0, src_pitch = 0;
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int bpp = pScreenPriv->screen->fb[0].bitsPerPixel;
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int bpp = pScreenPriv->screen->fb[0].bitsPerPixel;
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@ -181,7 +176,7 @@ ATISetup(ScreenPtr pScreen, PixmapPtr pDst, PixmapPtr pSrc)
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pScreenPriv->screen->memory_base);
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pScreenPriv->screen->memory_base);
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}
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}
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ATIWaitAvail(3);
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ATIWaitAvail((pSrc != NULL) ? 3 : 2);
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if (is_radeon) {
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if (is_radeon) {
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MMIO_OUT32(mmio, RADEON_REG_DST_PITCH_OFFSET,
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MMIO_OUT32(mmio, RADEON_REG_DST_PITCH_OFFSET,
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((dst_pitch >> 6) << 22) | (dst_offset >> 10));
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((dst_pitch >> 6) << 22) | (dst_offset >> 10));
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@ -225,7 +220,7 @@ ATIPrepareSolid(PixmapPtr pPixmap, int alu, Pixel pm, Pixel fg)
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return FALSE;
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return FALSE;
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}
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}
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if (!ATISetup(pPixmap->drawable.pScreen, pPixmap, NULL))
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if (!ATISetup(pPixmap, NULL))
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return FALSE;
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return FALSE;
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ATIWaitAvail(4);
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ATIWaitAvail(4);
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@ -273,7 +268,7 @@ ATIPrepareCopy(PixmapPtr pSrc, PixmapPtr pDst, int dx, int dy, int alu, Pixel pm
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if (is_24bpp && pm != 0xffffffff)
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if (is_24bpp && pm != 0xffffffff)
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return FALSE;
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return FALSE;
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if (!ATISetup(pDst->drawable.pScreen, pDst, pSrc))
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if (!ATISetup(pDst, pSrc))
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return FALSE;
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return FALSE;
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ATIWaitAvail(3);
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ATIWaitAvail(3);
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@ -377,10 +372,15 @@ ATIDrawInit(ScreenPtr pScreen)
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if (is_radeon) {
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if (is_radeon) {
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ATIKaa.offscreenByteAlign = 1024;
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ATIKaa.offscreenByteAlign = 1024;
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ATIKaa.offscreenPitch = 64;
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ATIKaa.offscreenPitch = 1024;
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} else {
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} else {
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ATIKaa.offscreenByteAlign = 8;
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ATIKaa.offscreenByteAlign = 8;
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ATIKaa.offscreenPitch = pScreenPriv->screen->fb[0].bitsPerPixel;
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/* Workaround for corrupation at 8 and 24bpp. Why? */
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if (atis->datatype == 2)
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ATIKaa.offscreenPitch = 16;
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else
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ATIKaa.offscreenPitch =
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pScreenPriv->screen->fb[0].bitsPerPixel;
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}
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}
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if (!kaaDrawInit(pScreen, &ATIKaa))
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if (!kaaDrawInit(pScreen, &ATIKaa))
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return FALSE;
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return FALSE;
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