484 lines
12 KiB
C
484 lines
12 KiB
C
/*
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* XFree86 int10 module
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* execute BIOS int 10h calls in x86 real mode environment
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* Copyright 1999 Egbert Eich
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*/
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#ifdef HAVE_XORG_CONFIG_H
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#include <xorg-config.h>
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#endif
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#include <errno.h>
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#include <string.h>
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#include <unistd.h>
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#include "xf86.h"
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#include "xf86_OSproc.h"
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#include "compiler.h"
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#define _INT10_PRIVATE
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#include "xf86int10.h"
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#include "int10Defines.h"
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#include "Pci.h"
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#define ALLOC_ENTRIES(x) ((V_RAM / x) - 1)
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#include <string.h> /* needed for memmove */
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static __inline__ uint32_t
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ldl_u(uint32_t * p)
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{
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uint32_t ret;
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memmove(&ret, p, sizeof(*p));
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return ret;
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}
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static __inline__ uint16_t
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ldw_u(uint16_t * p)
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{
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uint16_t ret;
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memmove(&ret, p, sizeof(*p));
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return ret;
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}
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static __inline__ void
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stl_u(uint32_t val, uint32_t * p)
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{
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uint32_t tmp = val;
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memmove(p, &tmp, sizeof(*p));
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}
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static __inline__ void
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stw_u(uint16_t val, uint16_t * p)
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{
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uint16_t tmp = val;
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memmove(p, &tmp, sizeof(*p));
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}
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static uint8_t read_b(xf86Int10InfoPtr pInt, int addr);
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static uint16_t read_w(xf86Int10InfoPtr pInt, int addr);
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static uint32_t read_l(xf86Int10InfoPtr pInt, int addr);
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static void write_b(xf86Int10InfoPtr pInt, int addr, uint8_t val);
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static void write_w(xf86Int10InfoPtr pInt, int addr, uint16_t val);
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static void write_l(xf86Int10InfoPtr pInt, int addr, uint32_t val);
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/*
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* the emulator cannot pass a pointer to the current xf86Int10InfoRec
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* to the memory access functions therefore store it here.
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*/
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typedef struct {
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int shift;
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int entries;
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void *base;
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void *vRam;
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int highMemory;
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void *sysMem;
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char *alloc;
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} genericInt10Priv;
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#define INTPriv(x) ((genericInt10Priv*)x->private)
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int10MemRec genericMem = {
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read_b,
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read_w,
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read_l,
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write_b,
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write_w,
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write_l
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};
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static void MapVRam(xf86Int10InfoPtr pInt);
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static void UnmapVRam(xf86Int10InfoPtr pInt);
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static void *sysMem = NULL;
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#ifdef _PC
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#define GET_HIGH_BASE(x) (((V_BIOS + (x) + getpagesize() - 1)/getpagesize()) \
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* getpagesize())
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static Bool
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readIntVec(struct pci_device *dev, unsigned char *buf, int len)
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{
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void *map;
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if (pci_device_map_legacy(dev, 0, len, 0, &map))
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return FALSE;
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memcpy(buf, map, len);
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pci_device_unmap_legacy(dev, map, len);
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return TRUE;
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}
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#endif /* _PC */
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xf86Int10InfoPtr
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xf86ExtendedInitInt10(int entityIndex, int Flags)
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{
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xf86Int10InfoPtr pInt;
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void *base = 0;
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void *vbiosMem = 0;
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void *options = NULL;
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legacyVGARec vga;
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ScrnInfoPtr pScrn;
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pScrn = xf86FindScreenForEntity(entityIndex);
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options = xf86HandleInt10Options(pScrn, entityIndex);
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if (int10skip(options)) {
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free(options);
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return NULL;
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}
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pInt = (xf86Int10InfoPtr) XNFcallocarray(1, sizeof(xf86Int10InfoRec));
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pInt->entityIndex = entityIndex;
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if (!xf86Int10ExecSetup(pInt))
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goto error0;
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pInt->mem = &genericMem;
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pInt->private = (void *) XNFcallocarray(1, sizeof(genericInt10Priv));
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INTPriv(pInt)->alloc = (void *) XNFcallocarray(1, ALLOC_ENTRIES(getpagesize()));
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pInt->pScrn = pScrn;
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base = INTPriv(pInt)->base = XNFalloc(SYS_BIOS);
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/* FIXME: Shouldn't this be a failure case? Leaving dev as NULL seems like
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* FIXME: an error
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*/
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pInt->dev = xf86GetPciInfoForEntity(entityIndex);
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/*
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* we need to map video RAM MMIO as some chipsets map mmio
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* registers into this range.
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*/
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MapVRam(pInt);
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#ifdef _PC
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if (!sysMem)
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pci_device_map_legacy(pInt->dev, V_BIOS, BIOS_SIZE + SYS_BIOS - V_BIOS,
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PCI_DEV_MAP_FLAG_WRITABLE, &sysMem);
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INTPriv(pInt)->sysMem = sysMem;
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if (!readIntVec(pInt->dev, base, LOW_PAGE_SIZE)) {
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xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Cannot read int vect\n");
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goto error1;
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}
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/*
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* Retrieve everything between V_BIOS and SYS_BIOS as some system BIOSes
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* have executable code there.
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*/
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memset((char *) base + V_BIOS, 0, SYS_BIOS - V_BIOS);
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INTPriv(pInt)->highMemory = V_BIOS;
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if (xf86IsEntityPrimary(entityIndex) && !(initPrimary(options))) {
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if (!xf86int10GetBiosSegment(pInt, (unsigned char *) sysMem - V_BIOS))
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goto error1;
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set_return_trap(pInt);
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pInt->Flags = Flags & (SET_BIOS_SCRATCH | RESTORE_BIOS_SCRATCH);
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if (!(pInt->Flags & SET_BIOS_SCRATCH))
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pInt->Flags &= ~RESTORE_BIOS_SCRATCH;
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xf86Int10SaveRestoreBIOSVars(pInt, TRUE);
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}
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else {
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const BusType location_type = xf86int10GetBiosLocationType(pInt);
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int bios_location = V_BIOS;
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reset_int_vect(pInt);
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set_return_trap(pInt);
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switch (location_type) {
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case BUS_PCI:{
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int err;
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struct pci_device *rom_device =
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xf86GetPciInfoForEntity(pInt->entityIndex);
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vbiosMem = (unsigned char *) base + bios_location;
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err = pci_device_read_rom(rom_device, vbiosMem);
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if (err) {
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xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Cannot read V_BIOS (3) %s\n",
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strerror(err));
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goto error1;
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}
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INTPriv(pInt)->highMemory = GET_HIGH_BASE(rom_device->rom_size);
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break;
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}
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default:
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goto error1;
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}
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pInt->BIOSseg = V_BIOS >> 4;
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pInt->num = 0xe6;
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LockLegacyVGA(pInt, &vga);
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xf86ExecX86int10(pInt);
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UnlockLegacyVGA(pInt, &vga);
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}
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#else
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if (!sysMem) {
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sysMem = XNFalloc(BIOS_SIZE);
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setup_system_bios(sysMem);
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}
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INTPriv(pInt)->sysMem = sysMem;
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setup_int_vect(pInt);
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set_return_trap(pInt);
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/* Retrieve the entire legacy video BIOS segment. This can be up to
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* 128KiB.
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*/
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vbiosMem = (char *) base + V_BIOS;
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memset(vbiosMem, 0, 2 * V_BIOS_SIZE);
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if (pci_device_read_rom(pInt->dev, vbiosMem) != 0
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|| pInt->dev->rom_size < V_BIOS_SIZE) {
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xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
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"Unable to retrieve all of segment 0x0C0000.\n");
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}
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/*
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* If this adapter is the primary, use its post-init BIOS (if we can find
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* it).
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*/
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{
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int bios_location = V_BIOS;
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Bool done = FALSE;
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vbiosMem = (unsigned char *) base + bios_location;
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if (xf86IsEntityPrimary(entityIndex)) {
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if (int10_check_bios(pScrn->scrnIndex, bios_location >> 4, vbiosMem))
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done = TRUE;
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else
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xf86DrvMsg(pScrn->scrnIndex, X_INFO,
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"No legacy BIOS found -- trying PCI\n");
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}
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if (!done) {
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int err;
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struct pci_device *rom_device =
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xf86GetPciInfoForEntity(pInt->entityIndex);
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err = pci_device_read_rom(rom_device, vbiosMem);
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if (err) {
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xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Cannot read V_BIOS (5) %s\n",
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strerror(err));
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goto error1;
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}
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}
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}
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pInt->BIOSseg = V_BIOS >> 4;
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pInt->num = 0xe6;
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LockLegacyVGA(pInt, &vga);
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xf86ExecX86int10(pInt);
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UnlockLegacyVGA(pInt, &vga);
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#endif
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free(options);
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return pInt;
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error1:
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free(base);
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UnmapVRam(pInt);
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free(INTPriv(pInt)->alloc);
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free(pInt->private);
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error0:
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free(pInt);
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free(options);
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return NULL;
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}
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static void
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MapVRam(xf86Int10InfoPtr pInt)
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{
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int pagesize = getpagesize();
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int size = ((VRAM_SIZE + pagesize - 1) / pagesize) * pagesize;
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pci_device_map_legacy(pInt->dev, V_RAM, size, PCI_DEV_MAP_FLAG_WRITABLE,
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&(INTPriv(pInt)->vRam));
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pInt->io = pci_legacy_open_io(pInt->dev, 0, 64 * 1024);
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}
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static void
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UnmapVRam(xf86Int10InfoPtr pInt)
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{
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int pagesize = getpagesize();
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int size = ((VRAM_SIZE + pagesize - 1) / pagesize) * pagesize;
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pci_device_unmap_legacy(pInt->dev, INTPriv(pInt)->vRam, size);
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pci_device_close_io(pInt->dev, pInt->io);
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pInt->io = NULL;
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}
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Bool
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MapCurrentInt10(xf86Int10InfoPtr pInt)
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{
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/* nothing to do here */
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return TRUE;
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}
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void
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xf86FreeInt10(xf86Int10InfoPtr pInt)
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{
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if (!pInt)
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return;
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#if defined (_PC)
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xf86Int10SaveRestoreBIOSVars(pInt, FALSE);
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#endif
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if (Int10Current == pInt)
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Int10Current = NULL;
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free(INTPriv(pInt)->base);
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UnmapVRam(pInt);
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free(INTPriv(pInt)->alloc);
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free(pInt->private);
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free(pInt);
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}
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void *
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xf86Int10AllocPages(xf86Int10InfoPtr pInt, int num, int *off)
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{
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int pagesize = getpagesize();
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int num_pages = ALLOC_ENTRIES(pagesize);
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int i, j;
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for (i = 0; i < (num_pages - num); i++) {
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if (INTPriv(pInt)->alloc[i] == 0) {
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for (j = i; j < (num + i); j++)
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if (INTPriv(pInt)->alloc[j] != 0)
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break;
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if (j == (num + i))
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break;
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i += num;
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}
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}
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if (i == (num_pages - num))
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return NULL;
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for (j = i; j < (i + num); j++)
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INTPriv(pInt)->alloc[j] = 1;
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*off = (i + 1) * pagesize;
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return (char *) INTPriv(pInt)->base + *off;
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}
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void
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xf86Int10FreePages(xf86Int10InfoPtr pInt, void *pbase, int num)
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{
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int pagesize = getpagesize();
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int first =
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(((char *) pbase - (char *) INTPriv(pInt)->base) / pagesize) - 1;
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int i;
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for (i = first; i < (first + num); i++)
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INTPriv(pInt)->alloc[i] = 0;
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}
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#define OFF(addr) ((addr) & 0xffff)
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#if defined _PC
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#define HIGH_OFFSET (INTPriv(pInt)->highMemory)
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#define HIGH_BASE V_BIOS
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#else
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#define HIGH_OFFSET SYS_BIOS
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#define HIGH_BASE SYS_BIOS
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#endif
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#define SYS(addr) ((addr) >= HIGH_OFFSET)
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#define V_ADDR(addr) \
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(SYS(addr) ? ((char*)INTPriv(pInt)->sysMem) + (addr - HIGH_BASE) \
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: (((char*)(INTPriv(pInt)->base) + addr)))
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#define VRAM_ADDR(addr) (addr - V_RAM)
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#define VRAM_BASE (INTPriv(pInt)->vRam)
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#define VRAM(addr) ((addr >= V_RAM) && (addr < (V_RAM + VRAM_SIZE)))
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#define V_ADDR_RB(addr) \
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((VRAM(addr)) ? MMIO_IN8((uint8_t*)VRAM_BASE,VRAM_ADDR(addr)) \
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: *(uint8_t*) V_ADDR(addr))
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#define V_ADDR_RW(addr) \
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((VRAM(addr)) ? MMIO_IN16((uint16_t*)VRAM_BASE,VRAM_ADDR(addr)) \
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: ldw_u((void *)V_ADDR(addr)))
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#define V_ADDR_RL(addr) \
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((VRAM(addr)) ? MMIO_IN32((uint32_t*)VRAM_BASE,VRAM_ADDR(addr)) \
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: ldl_u((void *)V_ADDR(addr)))
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#define V_ADDR_WB(addr,val) \
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if(VRAM(addr)) \
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MMIO_OUT8((uint8_t*)VRAM_BASE,VRAM_ADDR(addr),val); \
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else \
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*(uint8_t*) V_ADDR(addr) = val;
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#define V_ADDR_WW(addr,val) \
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if(VRAM(addr)) \
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MMIO_OUT16((uint16_t*)VRAM_BASE,VRAM_ADDR(addr),val); \
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else \
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stw_u((val),(void *)(V_ADDR(addr)));
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#define V_ADDR_WL(addr,val) \
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if (VRAM(addr)) \
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MMIO_OUT32((uint32_t*)VRAM_BASE,VRAM_ADDR(addr),val); \
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else \
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stl_u(val,(void *)(V_ADDR(addr)));
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static uint8_t
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read_b(xf86Int10InfoPtr pInt, int addr)
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{
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return V_ADDR_RB(addr);
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}
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static uint16_t
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read_w(xf86Int10InfoPtr pInt, int addr)
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{
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#if X_BYTE_ORDER == X_LITTLE_ENDIAN
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if (OFF(addr + 1) > 0)
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return V_ADDR_RW(addr);
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#endif
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return V_ADDR_RB(addr) | (V_ADDR_RB(addr + 1) << 8);
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}
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static uint32_t
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read_l(xf86Int10InfoPtr pInt, int addr)
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{
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#if X_BYTE_ORDER == X_LITTLE_ENDIAN
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if (OFF(addr + 3) > 2)
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return V_ADDR_RL(addr);
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#endif
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return V_ADDR_RB(addr) |
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(V_ADDR_RB(addr + 1) << 8) |
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(V_ADDR_RB(addr + 2) << 16) | (V_ADDR_RB(addr + 3) << 24);
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}
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static void
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write_b(xf86Int10InfoPtr pInt, int addr, uint8_t val)
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{
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V_ADDR_WB(addr, val);
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}
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static void
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write_w(xf86Int10InfoPtr pInt, int addr, CARD16 val)
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{
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#if X_BYTE_ORDER == X_LITTLE_ENDIAN
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if (OFF(addr + 1) > 0) {
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V_ADDR_WW(addr, val);
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}
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#endif
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V_ADDR_WB(addr, val);
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V_ADDR_WB(addr + 1, val >> 8);
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}
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static void
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write_l(xf86Int10InfoPtr pInt, int addr, uint32_t val)
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{
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#if X_BYTE_ORDER == X_LITTLE_ENDIAN
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if (OFF(addr + 3) > 2) {
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V_ADDR_WL(addr, val);
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}
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#endif
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V_ADDR_WB(addr, val);
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V_ADDR_WB(addr + 1, val >> 8);
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V_ADDR_WB(addr + 2, val >> 16);
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V_ADDR_WB(addr + 3, val >> 24);
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}
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void *
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xf86int10Addr(xf86Int10InfoPtr pInt, uint32_t addr)
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{
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return V_ADDR(addr);
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}
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