556 lines
15 KiB
C
556 lines
15 KiB
C
/* $XFree86: xc/programs/Xserver/hw/xfree86/int10/generic.c,v 1.29 2003/09/24 02:43:33 dawes Exp $ */
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/*
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* XFree86 int10 module
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* execute BIOS int 10h calls in x86 real mode environment
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* Copyright 1999 Egbert Eich
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*/
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#include "xf86.h"
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#include "xf86_OSproc.h"
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#include "xf86_ansic.h"
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#include "compiler.h"
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#define _INT10_PRIVATE
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#include "xf86int10.h"
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#include "int10Defines.h"
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#define ALLOC_ENTRIES(x) ((V_RAM / x) - 1)
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static CARD8 read_b(xf86Int10InfoPtr pInt,int addr);
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static CARD16 read_w(xf86Int10InfoPtr pInt,int addr);
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static CARD32 read_l(xf86Int10InfoPtr pInt,int addr);
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static void write_b(xf86Int10InfoPtr pInt,int addr, CARD8 val);
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static void write_w(xf86Int10InfoPtr pInt,int addr, CARD16 val);
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static void write_l(xf86Int10InfoPtr pInt,int addr, CARD32 val);
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/*
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* the emulator cannot pass a pointer to the current xf86Int10InfoRec
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* to the memory access functions therefore store it here.
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*/
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typedef struct {
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int shift;
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int entries;
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void* base;
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void* vRam;
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int highMemory;
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void* sysMem;
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char* alloc;
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} genericInt10Priv;
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#define INTPriv(x) ((genericInt10Priv*)x->private)
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int10MemRec genericMem = {
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read_b,
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read_w,
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read_l,
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write_b,
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write_w,
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write_l
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};
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static void MapVRam(xf86Int10InfoPtr pInt);
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static void UnmapVRam(xf86Int10InfoPtr pInt);
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#ifdef _PC
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#define GET_HIGH_BASE(x) (((V_BIOS + size + getpagesize() - 1)/getpagesize()) \
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* getpagesize())
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#endif
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static void *sysMem = NULL;
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xf86Int10InfoPtr
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xf86InitInt10(int entityIndex)
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{
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return xf86ExtendedInitInt10(entityIndex, 0);
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}
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xf86Int10InfoPtr
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xf86ExtendedInitInt10(int entityIndex, int Flags)
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{
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xf86Int10InfoPtr pInt;
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void* base = 0;
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void* vbiosMem = 0;
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void* options = NULL;
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pciVideoPtr pvp;
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int screen;
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legacyVGARec vga;
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xf86int10BiosLocation bios;
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#ifdef _PC
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int size;
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CARD32 cs;
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#endif
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screen = (xf86FindScreenForEntity(entityIndex))->scrnIndex;
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options = xf86HandleInt10Options(xf86Screens[screen],entityIndex);
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if (int10skip(options)) {
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xfree(options);
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return NULL;
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}
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pInt = (xf86Int10InfoPtr)xnfcalloc(1, sizeof(xf86Int10InfoRec));
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pInt->entityIndex = entityIndex;
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if (!xf86Int10ExecSetup(pInt))
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goto error0;
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pInt->mem = &genericMem;
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pInt->private = (pointer)xnfcalloc(1, sizeof(genericInt10Priv));
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INTPriv(pInt)->alloc = (pointer)xnfcalloc(1, ALLOC_ENTRIES(getpagesize()));
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pInt->scrnIndex = screen;
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base = INTPriv(pInt)->base = xnfalloc(SYS_BIOS);
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pvp = xf86GetPciInfoForEntity(entityIndex);
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if (pvp) pInt->Tag = ((pciConfigPtr)(pvp->thisCard))->tag;
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/*
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* we need to map video RAM MMIO as some chipsets map mmio
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* registers into this range.
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*/
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MapVRam(pInt);
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#ifdef _PC
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if (!sysMem)
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sysMem = xf86MapVidMem(screen, VIDMEM_MMIO, V_BIOS,
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BIOS_SIZE + SYS_BIOS - V_BIOS);
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INTPriv(pInt)->sysMem = sysMem;
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if (xf86ReadBIOS(0, 0, base, LOW_PAGE_SIZE) < 0) {
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xf86DrvMsg(screen, X_ERROR, "Cannot read int vect\n");
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goto error1;
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}
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/*
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* Retrieve everything between V_BIOS and SYS_BIOS as some system BIOSes
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* have executable code there. Note that xf86ReadBIOS() can only read in
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* 64kB at a time.
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*/
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(void)memset((char *)base + V_BIOS, 0, SYS_BIOS - V_BIOS);
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#if 0
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for (cs = V_BIOS; cs < SYS_BIOS; cs += V_BIOS_SIZE)
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if (xf86ReadBIOS(cs, 0, (unsigned char *)base + cs, V_BIOS_SIZE) <
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V_BIOS_SIZE)
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xf86DrvMsg(screen, X_WARNING,
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"Unable to retrieve all of segment 0x%06X.\n", cs);
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#endif
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INTPriv(pInt)->highMemory = V_BIOS;
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xf86int10ParseBiosLocation(options,&bios);
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if (xf86IsEntityPrimary(entityIndex)
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&& !(initPrimary(options))) {
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if (bios.bus == BUS_ISA && bios.location.legacy) {
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xf86DrvMsg(screen, X_CONFIG,
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"Overriding BIOS location: 0x%x\n",
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bios.location.legacy);
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cs = bios.location.legacy >> 4;
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#define CHECK_V_SEGMENT_RANGE(x) \
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if (((x) << 4) < V_BIOS) {\
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xf86DrvMsg(screen, X_ERROR, \
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"V_BIOS address 0x%lx out of range\n", \
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(unsigned long)(x) << 4); \
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goto error1; \
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}
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CHECK_V_SEGMENT_RANGE(cs);
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vbiosMem = (unsigned char *)sysMem - V_BIOS + (cs << 4);
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if (!int10_check_bios(screen, cs, vbiosMem)) {
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xf86DrvMsg(screen, X_ERROR,
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"No V_BIOS at specified address 0x%lx\n",
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(unsigned long)cs << 4);
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goto error1;
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}
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} else {
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if (bios.bus == BUS_PCI) {
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xf86DrvMsg(screen, X_WARNING,
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"Option BiosLocation for primary device ignored: "
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"It points to PCI.\n");
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xf86DrvMsg(screen, X_WARNING,
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"You must set Option InitPrimary also\n");
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}
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cs = MEM_RW(pInt,((0x10<<2)+2));
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CHECK_V_SEGMENT_RANGE(cs);
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vbiosMem = (unsigned char *)sysMem - V_BIOS + (cs << 4);
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if (!int10_check_bios(screen, cs, vbiosMem)) {
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cs = MEM_RW(pInt, (0x42 << 2) + 2);
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CHECK_V_SEGMENT_RANGE(cs);
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vbiosMem = (unsigned char *)sysMem - V_BIOS + (cs << 4);
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if (!int10_check_bios(screen, cs, vbiosMem)) {
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cs = V_BIOS >> 4;
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vbiosMem = (unsigned char *)sysMem - V_BIOS + (cs << 4);
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if (!int10_check_bios(screen, cs, vbiosMem)) {
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xf86DrvMsg(screen, X_ERROR, "No V_BIOS found\n");
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goto error1;
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}
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}
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}
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}
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xf86DrvMsg(screen, X_INFO, "Primary V_BIOS segment is: 0x%lx\n",
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(unsigned long)cs);
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set_return_trap(pInt);
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pInt->BIOSseg = cs;
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pInt->Flags = Flags & (SET_BIOS_SCRATCH | RESTORE_BIOS_SCRATCH);
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if (! (pInt->Flags & SET_BIOS_SCRATCH))
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pInt->Flags &= ~RESTORE_BIOS_SCRATCH;
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xf86Int10SaveRestoreBIOSVars(pInt, TRUE);
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} else {
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BusType location_type;
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int bios_location = V_BIOS;
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int pci_entity;
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EntityInfoPtr pEnt = xf86GetEntityInfo(pInt->entityIndex);
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reset_int_vect(pInt);
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set_return_trap(pInt);
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if (bios.bus != BUS_NONE) {
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switch (location_type = bios.bus) {
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case BUS_PCI:
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xf86DrvMsg(screen,X_CONFIG,"Overriding bios location: "
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"PCI:%i:%i%i\n",bios.location.pci.bus,
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bios.location.pci.dev,bios.location.pci.func);
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break;
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case BUS_ISA:
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bios_location = bios.location.legacy;
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if (bios.location.legacy)
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xf86DrvMsg(screen,X_CONFIG,"Overriding bios location: "
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"Legacy:0x%x\n",bios.location.legacy);
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else
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xf86DrvMsg(screen,X_CONFIG,"Overriding bios location: "
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"Legacy\n");
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break;
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default:
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break;
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}
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} else
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location_type = pEnt->location.type;
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switch (location_type) {
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case BUS_PCI:
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vbiosMem = (unsigned char *)base + bios_location;
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if (bios.bus == BUS_PCI)
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pci_entity = xf86GetPciEntity(bios.location.pci.bus,
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bios.location.pci.dev,
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bios.location.pci.func);
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else
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pci_entity = pInt->entityIndex;
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if (!(size = mapPciRom(pci_entity,(unsigned char *)(vbiosMem)))) {
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xf86DrvMsg(screen,X_ERROR,"Cannot read V_BIOS (3)\n");
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goto error1;
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}
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INTPriv(pInt)->highMemory = GET_HIGH_BASE(size);
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break;
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case BUS_ISA:
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vbiosMem = (unsigned char *)sysMem + bios_location;
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#if 0
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(void)memset(vbiosMem, 0, V_BIOS_SIZE);
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if (xf86ReadBIOS(bios_location, 0, vbiosMem, V_BIOS_SIZE)
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< V_BIOS_SIZE)
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xf86DrvMsg(screen, X_WARNING,
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"Unable to retrieve all of segment 0x%x.\n",bios_location);
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#endif
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if (!int10_check_bios(screen, bios_location >> 4, vbiosMem)) {
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xf86DrvMsg(screen,X_ERROR,"Cannot read V_BIOS (4)\n");
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goto error1;
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}
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default:
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goto error1;
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}
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xfree(pEnt);
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pInt->BIOSseg = V_BIOS >> 4;
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pInt->num = 0xe6;
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LockLegacyVGA(pInt, &vga);
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xf86ExecX86int10(pInt);
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UnlockLegacyVGA(pInt, &vga);
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}
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#else
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if (!sysMem) {
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sysMem = xnfalloc(BIOS_SIZE);
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setup_system_bios(sysMem);
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}
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INTPriv(pInt)->sysMem = sysMem;
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setup_int_vect(pInt);
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set_return_trap(pInt);
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/*
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* Retrieve two segments: one at V_BIOS, the other 64kB beyond the first.
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* This'll catch any BIOS that might have been initialised before server
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* entry.
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*/
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vbiosMem = (char *)base + V_BIOS;
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(void)memset(vbiosMem, 0, 2 * V_BIOS_SIZE);
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if (xf86ReadDomainMemory(pInt->Tag, V_BIOS, V_BIOS_SIZE, vbiosMem) <
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V_BIOS_SIZE)
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xf86DrvMsg(screen, X_WARNING,
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"Unable to retrieve all of segment 0x0C0000.\n");
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else if ((((unsigned char *)vbiosMem)[0] == 0x55) &&
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(((unsigned char *)vbiosMem)[1] == 0xAA) &&
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(((unsigned char *)vbiosMem)[2] > 0x80))
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if (xf86ReadDomainMemory(pInt->Tag, V_BIOS + V_BIOS_SIZE, V_BIOS_SIZE,
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(unsigned char *)vbiosMem + V_BIOS_SIZE) < V_BIOS_SIZE)
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xf86DrvMsg(screen, X_WARNING,
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"Unable to retrieve all of segment 0x0D0000.\n");
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/*
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* If this adapter is the primary, use its post-init BIOS (if we can find
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* it).
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*/
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xf86int10ParseBiosLocation(options,&bios);
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{
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int bios_location = V_BIOS;
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Bool done = FALSE;
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vbiosMem = (unsigned char *)base + bios_location;
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if ((bios.bus == BUS_ISA)
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|| (bios.bus != BUS_PCI && xf86IsEntityPrimary(entityIndex))) {
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if (bios.bus == BUS_ISA && bios.location.legacy) {
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xf86DrvMsg(screen, X_CONFIG,"Looking for legacy V_BIOS "
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"at 0x%x for %sprimary device\n",
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bios.location.legacy,
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xf86IsEntityPrimary(entityIndex) ? "" : "non-");
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bios_location = bios.location.legacy;
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vbiosMem = (unsigned char *)base + bios_location;
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}
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if (int10_check_bios(screen, bios_location >> 4, vbiosMem))
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done = TRUE;
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else
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xf86DrvMsg(screen,X_INFO,
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"No legacy BIOS found -- trying PCI\n");
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}
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if (!done) {
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int pci_entity;
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if (bios.bus == BUS_PCI) {
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xf86DrvMsg(screen,X_CONFIG,"Looking for BIOS at PCI:%i%i%i\n",
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bios.location.pci.bus,bios.location.pci.dev,
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bios.location.pci.func);
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pci_entity = xf86GetPciEntity(bios.location.pci.bus,
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bios.location.pci.dev,
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bios.location.pci.func);
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} else
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pci_entity = pInt->entityIndex;
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if (!mapPciRom(pci_entity, vbiosMem)) {
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xf86DrvMsg(screen, X_ERROR, "Cannot read V_BIOS (5)\n");
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goto error1;
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}
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}
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}
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pInt->BIOSseg = V_BIOS >> 4;
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pInt->num = 0xe6;
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LockLegacyVGA(pInt, &vga);
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xf86ExecX86int10(pInt);
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UnlockLegacyVGA(pInt, &vga);
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#endif
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xfree(options);
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return pInt;
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error1:
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xfree(base);
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UnmapVRam(pInt);
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xfree(INTPriv(pInt)->alloc);
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xfree(pInt->private);
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error0:
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xfree(pInt);
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xfree(options);
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return NULL;
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}
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static void
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MapVRam(xf86Int10InfoPtr pInt)
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{
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int pagesize = getpagesize();
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int size = ((VRAM_SIZE + pagesize - 1) / pagesize) * pagesize;
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INTPriv(pInt)->vRam = xf86MapDomainMemory(pInt->scrnIndex, VIDMEM_MMIO,
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pInt->Tag, V_RAM, size);
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pInt->ioBase = xf86Screens[pInt->scrnIndex]->domainIOBase;
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}
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static void
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UnmapVRam(xf86Int10InfoPtr pInt)
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{
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int screen = pInt->scrnIndex;
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int pagesize = getpagesize();
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int size = ((VRAM_SIZE + pagesize - 1)/pagesize) * pagesize;
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xf86UnMapVidMem(screen, INTPriv(pInt)->vRam, size);
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}
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Bool
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MapCurrentInt10(xf86Int10InfoPtr pInt)
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{
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/* nothing to do here */
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return TRUE;
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}
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void
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xf86FreeInt10(xf86Int10InfoPtr pInt)
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{
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if (!pInt)
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return;
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#if defined (_PC)
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xf86Int10SaveRestoreBIOSVars(pInt, FALSE);
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#endif
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if (Int10Current == pInt)
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Int10Current = NULL;
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xfree(INTPriv(pInt)->base);
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UnmapVRam(pInt);
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xfree(INTPriv(pInt)->alloc);
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xfree(pInt->private);
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xfree(pInt);
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}
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void *
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xf86Int10AllocPages(xf86Int10InfoPtr pInt, int num, int *off)
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{
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int pagesize = getpagesize();
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int num_pages = ALLOC_ENTRIES(pagesize);
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int i,j;
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for (i = 0; i < (num_pages - num); i++) {
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if (INTPriv(pInt)->alloc[i] == 0) {
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for (j = i; j < (num + i); j++)
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if (INTPriv(pInt)->alloc[j] != 0)
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break;
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if (j == (num + i))
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break;
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i += num;
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}
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}
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if (i == (num_pages - num))
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return NULL;
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for (j = i; j < (i + num); j++)
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INTPriv(pInt)->alloc[j] = 1;
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*off = (i + 1) * pagesize;
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return (char *)INTPriv(pInt)->base + *off;
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}
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void
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xf86Int10FreePages(xf86Int10InfoPtr pInt, void *pbase, int num)
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{
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int pagesize = getpagesize();
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int first = (((char *)pbase - (char *)INTPriv(pInt)->base) / pagesize) - 1;
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int i;
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for (i = first; i < (first + num); i++)
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INTPriv(pInt)->alloc[i] = 0;
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}
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#define OFF(addr) ((addr) & 0xffff)
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#if defined _PC
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# define HIGH_OFFSET (INTPriv(pInt)->highMemory)
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# define HIGH_BASE V_BIOS
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#else
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# define HIGH_OFFSET SYS_BIOS
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# define HIGH_BASE SYS_BIOS
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#endif
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# define SYS(addr) ((addr) >= HIGH_OFFSET)
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#define V_ADDR(addr) \
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(SYS(addr) ? ((char*)INTPriv(pInt)->sysMem) + (addr - HIGH_BASE) \
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: (((char*)(INTPriv(pInt)->base) + addr)))
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#define VRAM_ADDR(addr) (addr - V_RAM)
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#define VRAM_BASE (INTPriv(pInt)->vRam)
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#define VRAM(addr) ((addr >= V_RAM) && (addr < (V_RAM + VRAM_SIZE)))
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#define V_ADDR_RB(addr) \
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(VRAM(addr)) ? MMIO_IN8((CARD8*)VRAM_BASE,VRAM_ADDR(addr)) \
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: *(CARD8*) V_ADDR(addr)
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#define V_ADDR_RW(addr) \
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(VRAM(addr)) ? MMIO_IN16((CARD16*)VRAM_BASE,VRAM_ADDR(addr)) \
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: ldw_u((pointer)V_ADDR(addr))
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#define V_ADDR_RL(addr) \
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(VRAM(addr)) ? MMIO_IN32((CARD32*)VRAM_BASE,VRAM_ADDR(addr)) \
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: ldl_u((pointer)V_ADDR(addr))
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#define V_ADDR_WB(addr,val) \
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if(VRAM(addr)) \
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MMIO_OUT8((CARD8*)VRAM_BASE,VRAM_ADDR(addr),val); \
|
|
else \
|
|
*(CARD8*) V_ADDR(addr) = val;
|
|
#define V_ADDR_WW(addr,val) \
|
|
if(VRAM(addr)) \
|
|
MMIO_OUT16((CARD16*)VRAM_BASE,VRAM_ADDR(addr),val); \
|
|
else \
|
|
stw_u((val),(pointer)(V_ADDR(addr)));
|
|
|
|
#define V_ADDR_WL(addr,val) \
|
|
if (VRAM(addr)) \
|
|
MMIO_OUT32((CARD32*)VRAM_BASE,VRAM_ADDR(addr),val); \
|
|
else \
|
|
stl_u(val,(pointer)(V_ADDR(addr)));
|
|
|
|
static CARD8
|
|
read_b(xf86Int10InfoPtr pInt, int addr)
|
|
{
|
|
return V_ADDR_RB(addr);
|
|
}
|
|
|
|
static CARD16
|
|
read_w(xf86Int10InfoPtr pInt, int addr)
|
|
{
|
|
#if X_BYTE_ORDER == X_LITTLE_ENDIAN
|
|
if (OFF(addr + 1) > 0)
|
|
return V_ADDR_RW(addr);
|
|
#endif
|
|
return V_ADDR_RB(addr) | (V_ADDR_RB(addr + 1) << 8);
|
|
}
|
|
|
|
static CARD32
|
|
read_l(xf86Int10InfoPtr pInt, int addr)
|
|
{
|
|
#if X_BYTE_ORDER == X_LITTLE_ENDIAN
|
|
if (OFF(addr + 3) > 2)
|
|
return V_ADDR_RL(addr);
|
|
#endif
|
|
return V_ADDR_RB(addr) |
|
|
(V_ADDR_RB(addr + 1) << 8) |
|
|
(V_ADDR_RB(addr + 2) << 16) |
|
|
(V_ADDR_RB(addr + 3) << 24);
|
|
}
|
|
|
|
static void
|
|
write_b(xf86Int10InfoPtr pInt, int addr, CARD8 val)
|
|
{
|
|
V_ADDR_WB(addr,val);
|
|
}
|
|
|
|
static void
|
|
write_w(xf86Int10InfoPtr pInt, int addr, CARD16 val)
|
|
{
|
|
#if X_BYTE_ORDER == X_LITTLE_ENDIAN
|
|
if (OFF(addr + 1) > 0)
|
|
{ V_ADDR_WW(addr, val); }
|
|
#endif
|
|
V_ADDR_WB(addr, val);
|
|
V_ADDR_WB(addr + 1, val >> 8);
|
|
}
|
|
|
|
static void
|
|
write_l(xf86Int10InfoPtr pInt, int addr, CARD32 val)
|
|
{
|
|
#if X_BYTE_ORDER == X_LITTLE_ENDIAN
|
|
if (OFF(addr + 3) > 2)
|
|
{ V_ADDR_WL(addr, val); }
|
|
#endif
|
|
V_ADDR_WB(addr, val);
|
|
V_ADDR_WB(addr + 1, val >> 8);
|
|
V_ADDR_WB(addr + 2, val >> 16);
|
|
V_ADDR_WB(addr + 3, val >> 24);
|
|
}
|
|
|
|
pointer
|
|
xf86int10Addr(xf86Int10InfoPtr pInt, CARD32 addr)
|
|
{
|
|
return V_ADDR(addr);
|
|
}
|