1038 lines
29 KiB
C
1038 lines
29 KiB
C
/*
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* Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany.
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*
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* Permission to use, copy, modify, distribute, and sell this software and its
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* documentation for any purpose is hereby granted without fee, provided that
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* the above copyright notice appear in all copies and that both that
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* copyright notice and this permission notice appear in supporting
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* documentation, and that the name of Thomas Roell not be used in
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* advertising or publicity pertaining to distribution of the software without
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* specific, written prior permission. Thomas Roell makes no representations
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* about the suitability of this software for any purpose. It is provided
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* "as is" without express or implied warranty.
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*
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* THOMAS ROELL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
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* EVENT SHALL THOMAS ROELL BE LIABLE FOR ANY SPECIAL, INDIRECT OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
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* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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/*
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* Copyright (c) 1994-2003 by The XFree86 Project, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Except as contained in this notice, the name of the copyright holder(s)
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* and author(s) shall not be used in advertising or otherwise to promote
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* the sale, use or other dealings in this Software without prior written
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* authorization from the copyright holder(s) and author(s).
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*/
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#ifndef _COMPILER_H
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#define _COMPILER_H
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#ifndef _X_EXPORT
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#include <X11/Xfuncproto.h>
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#endif
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#include <pixman.h> /* for uint*_t types */
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/* Allow drivers to use the GCC-supported __inline__ and/or __inline. */
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#ifndef __inline__
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#if defined(__GNUC__)
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/* gcc has __inline__ */
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#else
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#define __inline__ /**/
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#endif
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#endif /* __inline__ */
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#ifndef __inline
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#if defined(__GNUC__)
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/* gcc has __inline */
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#else
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#define __inline /**/
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#endif
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#endif /* __inline */
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/* Support gcc's __FUNCTION__ for people using other compilers */
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#if !defined(__GNUC__) && !defined(__FUNCTION__)
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#define __FUNCTION__ __func__ /* C99 */
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#endif
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#ifdef __GNUC__
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#ifdef __i386__
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#ifdef __SSE__
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#define write_mem_barrier() __asm__ __volatile__ ("sfence" : : : "memory")
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#else
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#define write_mem_barrier() __asm__ __volatile__ ("lock; addl $0,0(%%esp)" : : : "memory")
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#endif
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#ifdef __SSE2__
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#define mem_barrier() __asm__ __volatile__ ("mfence" : : : "memory")
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#else
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#define mem_barrier() __asm__ __volatile__ ("lock; addl $0,0(%%esp)" : : : "memory")
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#endif
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#elif defined __alpha__
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#define mem_barrier() __asm__ __volatile__ ("mb" : : : "memory")
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#define write_mem_barrier() __asm__ __volatile__ ("wmb" : : : "memory")
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#elif defined __amd64__
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#define mem_barrier() __asm__ __volatile__ ("mfence" : : : "memory")
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#define write_mem_barrier() __asm__ __volatile__ ("sfence" : : : "memory")
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#elif defined __ia64__
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#ifndef __INTEL_COMPILER
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#define mem_barrier() __asm__ __volatile__ ("mf" : : : "memory")
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#define write_mem_barrier() __asm__ __volatile__ ("mf" : : : "memory")
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#else
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#include "ia64intrin.h"
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#define mem_barrier() __mf()
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#define write_mem_barrier() __mf()
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#endif
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#elif defined __mips__
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/* Note: sync instruction requires MIPS II instruction set */
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#define mem_barrier() \
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__asm__ __volatile__( \
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".set push\n\t" \
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".set noreorder\n\t" \
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".set mips2\n\t" \
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"sync\n\t" \
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".set pop" \
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: /* no output */ \
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: /* no input */ \
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: "memory")
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#define write_mem_barrier() mem_barrier()
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#elif defined __powerpc__
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#ifndef eieio
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#define eieio() __asm__ __volatile__ ("eieio" ::: "memory")
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#endif /* eieio */
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#define mem_barrier() eieio()
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#define write_mem_barrier() eieio()
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#elif defined __sparc__
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#define barrier() __asm__ __volatile__ (".word 0x8143e00a" : : : "memory")
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#define mem_barrier() /* XXX: nop for now */
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#define write_mem_barrier() /* XXX: nop for now */
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#endif
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#endif /* __GNUC__ */
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#ifndef barrier
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#define barrier()
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#endif
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#ifndef mem_barrier
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#define mem_barrier() /* NOP */
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#endif
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#ifndef write_mem_barrier
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#define write_mem_barrier() /* NOP */
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#endif
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#ifdef __GNUC__
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#if defined(__alpha__)
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#ifdef __linux__
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/* for Linux on Alpha, we use the LIBC _inx/_outx routines */
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/* note that the appropriate setup via "ioperm" needs to be done */
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/* *before* any inx/outx is done. */
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extern _X_EXPORT void _outb(unsigned char val, unsigned long port);
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extern _X_EXPORT void _outw(unsigned short val, unsigned long port);
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extern _X_EXPORT void _outl(unsigned int val, unsigned long port);
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extern _X_EXPORT unsigned int _inb(unsigned long port);
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extern _X_EXPORT unsigned int _inw(unsigned long port);
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extern _X_EXPORT unsigned int _inl(unsigned long port);
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static __inline__ void
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outb(unsigned long port, unsigned char val)
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{
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_outb(val, port);
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}
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static __inline__ void
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outw(unsigned long port, unsigned short val)
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{
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_outw(val, port);
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}
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static __inline__ void
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outl(unsigned long port, unsigned int val)
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{
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_outl(val, port);
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}
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static __inline__ unsigned int
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inb(unsigned long port)
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{
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return _inb(port);
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}
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static __inline__ unsigned int
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inw(unsigned long port)
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{
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return _inw(port);
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}
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static __inline__ unsigned int
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inl(unsigned long port)
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{
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return _inl(port);
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}
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#endif /* __linux__ */
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#if (defined(__FreeBSD__) || defined(__OpenBSD__))
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/* for FreeBSD and OpenBSD on Alpha, we use the libio (resp. libalpha) */
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/* inx/outx routines */
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/* note that the appropriate setup via "ioperm" needs to be done */
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/* *before* any inx/outx is done. */
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extern _X_EXPORT void outb(unsigned int port, unsigned char val);
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extern _X_EXPORT void outw(unsigned int port, unsigned short val);
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extern _X_EXPORT void outl(unsigned int port, unsigned int val);
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extern _X_EXPORT unsigned char inb(unsigned int port);
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extern _X_EXPORT unsigned short inw(unsigned int port);
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extern _X_EXPORT unsigned int inl(unsigned int port);
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#endif /* (__FreeBSD__ || __OpenBSD__ ) */
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#if defined(__NetBSD__)
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#include <machine/pio.h>
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#endif /* __NetBSD__ */
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#elif defined(__amd64__) || defined(__i386__) || defined(__ia64__)
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#include <inttypes.h>
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static __inline__ void
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outb(unsigned short port, unsigned char val)
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{
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__asm__ __volatile__("outb %0,%1"::"a"(val), "d"(port));
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}
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static __inline__ void
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outw(unsigned short port, unsigned short val)
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{
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__asm__ __volatile__("outw %0,%1"::"a"(val), "d"(port));
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}
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static __inline__ void
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outl(unsigned short port, unsigned int val)
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{
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__asm__ __volatile__("outl %0,%1"::"a"(val), "d"(port));
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}
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static __inline__ unsigned int
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inb(unsigned short port)
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{
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unsigned char ret;
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__asm__ __volatile__("inb %1,%0":"=a"(ret):"d"(port));
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return ret;
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}
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static __inline__ unsigned int
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inw(unsigned short port)
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{
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unsigned short ret;
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__asm__ __volatile__("inw %1,%0":"=a"(ret):"d"(port));
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return ret;
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}
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static __inline__ unsigned int
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inl(unsigned short port)
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{
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unsigned int ret;
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__asm__ __volatile__("inl %1,%0":"=a"(ret):"d"(port));
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return ret;
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}
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#elif defined(__sparc__)
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#ifndef ASI_PL
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#define ASI_PL 0x88
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#endif
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static __inline__ void
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outb(unsigned long port, unsigned char val)
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{
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__asm__ __volatile__("stba %0, [%1] %2": /* No outputs */
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:"r"(val), "r"(port), "i"(ASI_PL));
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barrier();
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}
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static __inline__ void
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outw(unsigned long port, unsigned short val)
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{
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__asm__ __volatile__("stha %0, [%1] %2": /* No outputs */
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:"r"(val), "r"(port), "i"(ASI_PL));
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barrier();
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}
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static __inline__ void
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outl(unsigned long port, unsigned int val)
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{
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__asm__ __volatile__("sta %0, [%1] %2": /* No outputs */
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:"r"(val), "r"(port), "i"(ASI_PL));
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barrier();
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}
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static __inline__ unsigned int
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inb(unsigned long port)
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{
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unsigned int ret;
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__asm__ __volatile__("lduba [%1] %2, %0":"=r"(ret)
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:"r"(port), "i"(ASI_PL));
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return ret;
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}
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static __inline__ unsigned int
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inw(unsigned long port)
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{
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unsigned int ret;
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__asm__ __volatile__("lduha [%1] %2, %0":"=r"(ret)
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:"r"(port), "i"(ASI_PL));
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return ret;
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}
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static __inline__ unsigned int
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inl(unsigned long port)
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{
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unsigned int ret;
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__asm__ __volatile__("lda [%1] %2, %0":"=r"(ret)
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:"r"(port), "i"(ASI_PL));
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return ret;
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}
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static __inline__ unsigned char
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xf86ReadMmio8(__volatile__ void *base, const unsigned long offset)
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{
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unsigned long addr = ((unsigned long) base) + offset;
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unsigned char ret;
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__asm__ __volatile__("lduba [%1] %2, %0":"=r"(ret)
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:"r"(addr), "i"(ASI_PL));
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return ret;
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}
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static __inline__ unsigned short
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xf86ReadMmio16Be(__volatile__ void *base, const unsigned long offset)
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{
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unsigned long addr = ((unsigned long) base) + offset;
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unsigned short ret;
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__asm__ __volatile__("lduh [%1], %0":"=r"(ret)
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:"r"(addr));
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return ret;
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}
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static __inline__ unsigned short
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xf86ReadMmio16Le(__volatile__ void *base, const unsigned long offset)
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{
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unsigned long addr = ((unsigned long) base) + offset;
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unsigned short ret;
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__asm__ __volatile__("lduha [%1] %2, %0":"=r"(ret)
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:"r"(addr), "i"(ASI_PL));
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return ret;
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}
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static __inline__ unsigned int
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xf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset)
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{
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unsigned long addr = ((unsigned long) base) + offset;
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unsigned int ret;
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__asm__ __volatile__("ld [%1], %0":"=r"(ret)
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:"r"(addr));
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return ret;
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}
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static __inline__ unsigned int
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xf86ReadMmio32Le(__volatile__ void *base, const unsigned long offset)
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{
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unsigned long addr = ((unsigned long) base) + offset;
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unsigned int ret;
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__asm__ __volatile__("lda [%1] %2, %0":"=r"(ret)
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:"r"(addr), "i"(ASI_PL));
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return ret;
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}
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static __inline__ void
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xf86WriteMmio8(__volatile__ void *base, const unsigned long offset,
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const unsigned int val)
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{
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unsigned long addr = ((unsigned long) base) + offset;
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__asm__ __volatile__("stba %0, [%1] %2": /* No outputs */
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:"r"(val), "r"(addr), "i"(ASI_PL));
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barrier();
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}
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static __inline__ void
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xf86WriteMmio16Be(__volatile__ void *base, const unsigned long offset,
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const unsigned int val)
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{
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unsigned long addr = ((unsigned long) base) + offset;
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__asm__ __volatile__("sth %0, [%1]": /* No outputs */
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:"r"(val), "r"(addr));
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barrier();
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}
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static __inline__ void
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xf86WriteMmio16Le(__volatile__ void *base, const unsigned long offset,
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const unsigned int val)
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{
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unsigned long addr = ((unsigned long) base) + offset;
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__asm__ __volatile__("stha %0, [%1] %2": /* No outputs */
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:"r"(val), "r"(addr), "i"(ASI_PL));
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barrier();
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}
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static __inline__ void
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xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
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const unsigned int val)
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{
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unsigned long addr = ((unsigned long) base) + offset;
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__asm__ __volatile__("st %0, [%1]": /* No outputs */
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:"r"(val), "r"(addr));
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barrier();
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}
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static __inline__ void
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xf86WriteMmio32Le(__volatile__ void *base, const unsigned long offset,
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const unsigned int val)
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{
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unsigned long addr = ((unsigned long) base) + offset;
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__asm__ __volatile__("sta %0, [%1] %2": /* No outputs */
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:"r"(val), "r"(addr), "i"(ASI_PL));
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barrier();
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}
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#elif defined(__arm32__) && !defined(__linux__)
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#define PORT_SIZE long
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extern _X_EXPORT unsigned int IOPortBase; /* Memory mapped I/O port area */
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static __inline__ void
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outb(unsigned PORT_SIZE port, unsigned char val)
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{
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*(volatile unsigned char *) (((unsigned PORT_SIZE) (port)) + IOPortBase) =
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val;
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}
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static __inline__ void
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outw(unsigned PORT_SIZE port, unsigned short val)
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{
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*(volatile unsigned short *) (((unsigned PORT_SIZE) (port)) + IOPortBase) =
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val;
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}
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static __inline__ void
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outl(unsigned PORT_SIZE port, unsigned int val)
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{
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*(volatile unsigned int *) (((unsigned PORT_SIZE) (port)) + IOPortBase) =
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val;
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}
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static __inline__ unsigned int
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inb(unsigned PORT_SIZE port)
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{
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return *(volatile unsigned char *) (((unsigned PORT_SIZE) (port)) +
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IOPortBase);
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}
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static __inline__ unsigned int
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inw(unsigned PORT_SIZE port)
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{
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return *(volatile unsigned short *) (((unsigned PORT_SIZE) (port)) +
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IOPortBase);
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}
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static __inline__ unsigned int
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inl(unsigned PORT_SIZE port)
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{
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return *(volatile unsigned int *) (((unsigned PORT_SIZE) (port)) +
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IOPortBase);
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}
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#if defined(__mips__)
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#ifdef __linux__ /* don't mess with other OSs */
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#if X_BYTE_ORDER == X_BIG_ENDIAN
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static __inline__ unsigned int
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xf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset)
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{
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unsigned long addr = ((unsigned long) base) + offset;
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unsigned int ret;
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__asm__ __volatile__("lw %0, 0(%1)":"=r"(ret)
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:"r"(addr));
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return ret;
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}
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static __inline__ void
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xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
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const unsigned int val)
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{
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unsigned long addr = ((unsigned long) base) + offset;
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__asm__ __volatile__("sw %0, 0(%1)": /* No outputs */
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:"r"(val), "r"(addr));
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}
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#endif
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#endif /* !__linux__ */
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#endif /* __mips__ */
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#elif defined(__powerpc__)
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#ifndef MAP_FAILED
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#define MAP_FAILED ((void *)-1)
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#endif
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extern _X_EXPORT volatile unsigned char *ioBase;
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static __inline__ unsigned char
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xf86ReadMmio8(__volatile__ void *base, const unsigned long offset)
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{
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register unsigned char val;
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__asm__ __volatile__("lbzx %0,%1,%2\n\t" "eieio":"=r"(val)
|
|
:"b"(base), "r"(offset),
|
|
"m"(*((volatile unsigned char *) base + offset)));
|
|
return val;
|
|
}
|
|
|
|
static __inline__ unsigned short
|
|
xf86ReadMmio16Be(__volatile__ void *base, const unsigned long offset)
|
|
{
|
|
register unsigned short val;
|
|
__asm__ __volatile__("lhzx %0,%1,%2\n\t" "eieio":"=r"(val)
|
|
:"b"(base), "r"(offset),
|
|
"m"(*((volatile unsigned char *) base + offset)));
|
|
return val;
|
|
}
|
|
|
|
static __inline__ unsigned short
|
|
xf86ReadMmio16Le(__volatile__ void *base, const unsigned long offset)
|
|
{
|
|
register unsigned short val;
|
|
__asm__ __volatile__("lhbrx %0,%1,%2\n\t" "eieio":"=r"(val)
|
|
:"b"(base), "r"(offset),
|
|
"m"(*((volatile unsigned char *) base + offset)));
|
|
return val;
|
|
}
|
|
|
|
static __inline__ unsigned int
|
|
xf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset)
|
|
{
|
|
register unsigned int val;
|
|
__asm__ __volatile__("lwzx %0,%1,%2\n\t" "eieio":"=r"(val)
|
|
:"b"(base), "r"(offset),
|
|
"m"(*((volatile unsigned char *) base + offset)));
|
|
return val;
|
|
}
|
|
|
|
static __inline__ unsigned int
|
|
xf86ReadMmio32Le(__volatile__ void *base, const unsigned long offset)
|
|
{
|
|
register unsigned int val;
|
|
__asm__ __volatile__("lwbrx %0,%1,%2\n\t" "eieio":"=r"(val)
|
|
:"b"(base), "r"(offset),
|
|
"m"(*((volatile unsigned char *) base + offset)));
|
|
return val;
|
|
}
|
|
|
|
static __inline__ void
|
|
xf86WriteMmio8(__volatile__ void *base, const unsigned long offset,
|
|
const unsigned char val)
|
|
{
|
|
__asm__
|
|
__volatile__("stbx %1,%2,%3\n\t":"=m"
|
|
(*((volatile unsigned char *) base + offset))
|
|
:"r"(val), "b"(base), "r"(offset));
|
|
eieio();
|
|
}
|
|
|
|
static __inline__ void
|
|
xf86WriteMmio16Le(__volatile__ void *base, const unsigned long offset,
|
|
const unsigned short val)
|
|
{
|
|
__asm__
|
|
__volatile__("sthbrx %1,%2,%3\n\t":"=m"
|
|
(*((volatile unsigned char *) base + offset))
|
|
:"r"(val), "b"(base), "r"(offset));
|
|
eieio();
|
|
}
|
|
|
|
static __inline__ void
|
|
xf86WriteMmio16Be(__volatile__ void *base, const unsigned long offset,
|
|
const unsigned short val)
|
|
{
|
|
__asm__
|
|
__volatile__("sthx %1,%2,%3\n\t":"=m"
|
|
(*((volatile unsigned char *) base + offset))
|
|
:"r"(val), "b"(base), "r"(offset));
|
|
eieio();
|
|
}
|
|
|
|
static __inline__ void
|
|
xf86WriteMmio32Le(__volatile__ void *base, const unsigned long offset,
|
|
const unsigned int val)
|
|
{
|
|
__asm__
|
|
__volatile__("stwbrx %1,%2,%3\n\t":"=m"
|
|
(*((volatile unsigned char *) base + offset))
|
|
:"r"(val), "b"(base), "r"(offset));
|
|
eieio();
|
|
}
|
|
|
|
static __inline__ void
|
|
xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
|
|
const unsigned int val)
|
|
{
|
|
__asm__
|
|
__volatile__("stwx %1,%2,%3\n\t":"=m"
|
|
(*((volatile unsigned char *) base + offset))
|
|
:"r"(val), "b"(base), "r"(offset));
|
|
eieio();
|
|
}
|
|
|
|
static __inline__ void
|
|
outb(unsigned short port, unsigned char value)
|
|
{
|
|
if (ioBase == MAP_FAILED)
|
|
return;
|
|
xf86WriteMmio8((void *) ioBase, port, value);
|
|
}
|
|
|
|
static __inline__ void
|
|
outw(unsigned short port, unsigned short value)
|
|
{
|
|
if (ioBase == MAP_FAILED)
|
|
return;
|
|
xf86WriteMmio16Le((void *) ioBase, port, value);
|
|
}
|
|
|
|
static __inline__ void
|
|
outl(unsigned short port, unsigned int value)
|
|
{
|
|
if (ioBase == MAP_FAILED)
|
|
return;
|
|
xf86WriteMmio32Le((void *) ioBase, port, value);
|
|
}
|
|
|
|
static __inline__ unsigned int
|
|
inb(unsigned short port)
|
|
{
|
|
if (ioBase == MAP_FAILED)
|
|
return 0;
|
|
return xf86ReadMmio8((void *) ioBase, port);
|
|
}
|
|
|
|
static __inline__ unsigned int
|
|
inw(unsigned short port)
|
|
{
|
|
if (ioBase == MAP_FAILED)
|
|
return 0;
|
|
return xf86ReadMmio16Le((void *) ioBase, port);
|
|
}
|
|
|
|
static __inline__ unsigned int
|
|
inl(unsigned short port)
|
|
{
|
|
if (ioBase == MAP_FAILED)
|
|
return 0;
|
|
return xf86ReadMmio32Le((void *) ioBase, port);
|
|
}
|
|
|
|
#elif defined(__nds32__)
|
|
|
|
/*
|
|
* Assume all port access are aligned. We need to revise this implementation
|
|
* if there is unaligned port access.
|
|
*/
|
|
|
|
#define PORT_SIZE long
|
|
|
|
static __inline__ unsigned char
|
|
xf86ReadMmio8(__volatile__ void *base, const unsigned long offset)
|
|
{
|
|
return *(volatile unsigned char *) ((unsigned char *) base + offset);
|
|
}
|
|
|
|
static __inline__ void
|
|
xf86WriteMmio8(__volatile__ void *base, const unsigned long offset,
|
|
const unsigned int val)
|
|
{
|
|
*(volatile unsigned char *) ((unsigned char *) base + offset) = val;
|
|
barrier();
|
|
}
|
|
|
|
static __inline__ unsigned short
|
|
xf86ReadMmio16Swap(__volatile__ void *base, const unsigned long offset)
|
|
{
|
|
unsigned long addr = ((unsigned long) base) + offset;
|
|
unsigned short ret;
|
|
|
|
__asm__ __volatile__("lhi %0, [%1];\n\t" "wsbh %0, %0;\n\t":"=r"(ret)
|
|
:"r"(addr));
|
|
|
|
return ret;
|
|
}
|
|
|
|
static __inline__ unsigned short
|
|
xf86ReadMmio16(__volatile__ void *base, const unsigned long offset)
|
|
{
|
|
return *(volatile unsigned short *) ((char *) base + offset);
|
|
}
|
|
|
|
static __inline__ void
|
|
xf86WriteMmio16Swap(__volatile__ void *base, const unsigned long offset,
|
|
const unsigned int val)
|
|
{
|
|
unsigned long addr = ((unsigned long) base) + offset;
|
|
|
|
__asm__ __volatile__("wsbh %0, %0;\n\t" "shi %0, [%1];\n\t": /* No outputs */
|
|
:"r"(val), "r"(addr));
|
|
|
|
barrier();
|
|
}
|
|
|
|
static __inline__ void
|
|
xf86WriteMmio16(__volatile__ void *base, const unsigned long offset,
|
|
const unsigned int val)
|
|
{
|
|
*(volatile unsigned short *) ((unsigned char *) base + offset) = val;
|
|
barrier();
|
|
}
|
|
|
|
static __inline__ unsigned int
|
|
xf86ReadMmio32Swap(__volatile__ void *base, const unsigned long offset)
|
|
{
|
|
unsigned long addr = ((unsigned long) base) + offset;
|
|
unsigned int ret;
|
|
|
|
__asm__ __volatile__("lwi %0, [%1];\n\t"
|
|
"wsbh %0, %0;\n\t" "rotri %0, %0, 16;\n\t":"=r"(ret)
|
|
:"r"(addr));
|
|
|
|
return ret;
|
|
}
|
|
|
|
static __inline__ unsigned int
|
|
xf86ReadMmio32(__volatile__ void *base, const unsigned long offset)
|
|
{
|
|
return *(volatile unsigned int *) ((unsigned char *) base + offset);
|
|
}
|
|
|
|
static __inline__ void
|
|
xf86WriteMmio32Swap(__volatile__ void *base, const unsigned long offset,
|
|
const unsigned int val)
|
|
{
|
|
unsigned long addr = ((unsigned long) base) + offset;
|
|
|
|
__asm__ __volatile__("wsbh %0, %0;\n\t" "rotri %0, %0, 16;\n\t" "swi %0, [%1];\n\t": /* No outputs */
|
|
:"r"(val), "r"(addr));
|
|
|
|
barrier();
|
|
}
|
|
|
|
static __inline__ void
|
|
xf86WriteMmio32(__volatile__ void *base, const unsigned long offset,
|
|
const unsigned int val)
|
|
{
|
|
*(volatile unsigned int *) ((unsigned char *) base + offset) = val;
|
|
barrier();
|
|
}
|
|
|
|
#if defined(NDS32_MMIO_SWAP)
|
|
static __inline__ void
|
|
outb(unsigned PORT_SIZE port, unsigned char val)
|
|
{
|
|
xf86WriteMmio8(IOPortBase, port, val);
|
|
}
|
|
|
|
static __inline__ void
|
|
outw(unsigned PORT_SIZE port, unsigned short val)
|
|
{
|
|
xf86WriteMmio16Swap(IOPortBase, port, val);
|
|
}
|
|
|
|
static __inline__ void
|
|
outl(unsigned PORT_SIZE port, unsigned int val)
|
|
{
|
|
xf86WriteMmio32Swap(IOPortBase, port, val);
|
|
}
|
|
|
|
static __inline__ unsigned int
|
|
inb(unsigned PORT_SIZE port)
|
|
{
|
|
return xf86ReadMmio8(IOPortBase, port);
|
|
}
|
|
|
|
static __inline__ unsigned int
|
|
inw(unsigned PORT_SIZE port)
|
|
{
|
|
return xf86ReadMmio16Swap(IOPortBase, port);
|
|
}
|
|
|
|
static __inline__ unsigned int
|
|
inl(unsigned PORT_SIZE port)
|
|
{
|
|
return xf86ReadMmio32Swap(IOPortBase, port);
|
|
}
|
|
|
|
#else /* !NDS32_MMIO_SWAP */
|
|
static __inline__ void
|
|
outb(unsigned PORT_SIZE port, unsigned char val)
|
|
{
|
|
*(volatile unsigned char *) (((unsigned PORT_SIZE) (port))) = val;
|
|
barrier();
|
|
}
|
|
|
|
static __inline__ void
|
|
outw(unsigned PORT_SIZE port, unsigned short val)
|
|
{
|
|
*(volatile unsigned short *) (((unsigned PORT_SIZE) (port))) = val;
|
|
barrier();
|
|
}
|
|
|
|
static __inline__ void
|
|
outl(unsigned PORT_SIZE port, unsigned int val)
|
|
{
|
|
*(volatile unsigned int *) (((unsigned PORT_SIZE) (port))) = val;
|
|
barrier();
|
|
}
|
|
|
|
static __inline__ unsigned int
|
|
inb(unsigned PORT_SIZE port)
|
|
{
|
|
return *(volatile unsigned char *) (((unsigned PORT_SIZE) (port)));
|
|
}
|
|
|
|
static __inline__ unsigned int
|
|
inw(unsigned PORT_SIZE port)
|
|
{
|
|
return *(volatile unsigned short *) (((unsigned PORT_SIZE) (port)));
|
|
}
|
|
|
|
static __inline__ unsigned int
|
|
inl(unsigned PORT_SIZE port)
|
|
{
|
|
return *(volatile unsigned int *) (((unsigned PORT_SIZE) (port)));
|
|
}
|
|
|
|
#endif /* NDS32_MMIO_SWAP */
|
|
|
|
#endif /* arch madness */
|
|
|
|
#else /* !GNUC */
|
|
#if defined(__STDC__) && (__STDC__ == 1)
|
|
#ifndef asm
|
|
#define asm __asm
|
|
#endif
|
|
#endif
|
|
#include <sys/inline.h>
|
|
#endif /* __GNUC__ */
|
|
|
|
#if !defined(MMIO_IS_BE) && \
|
|
(defined(SPARC_MMIO_IS_BE) || defined(PPC_MMIO_IS_BE))
|
|
#define MMIO_IS_BE
|
|
#endif
|
|
|
|
#ifdef __alpha__
|
|
static inline int
|
|
xf86ReadMmio8(void *Base, unsigned long Offset)
|
|
{
|
|
mem_barrier();
|
|
return *(CARD8 *) ((unsigned long) Base + (Offset));
|
|
}
|
|
|
|
static inline int
|
|
xf86ReadMmio16(void *Base, unsigned long Offset)
|
|
{
|
|
mem_barrier();
|
|
return *(CARD16 *) ((unsigned long) Base + (Offset));
|
|
}
|
|
|
|
static inline int
|
|
xf86ReadMmio32(void *Base, unsigned long Offset)
|
|
{
|
|
mem_barrier();
|
|
return *(CARD32 *) ((unsigned long) Base + (Offset));
|
|
}
|
|
|
|
static inline void
|
|
xf86WriteMmio8(int Value, void *Base, unsigned long Offset)
|
|
{
|
|
write_mem_barrier();
|
|
*(CARD8 *) ((unsigned long) Base + (Offset)) = Value;
|
|
}
|
|
|
|
static inline void
|
|
xf86WriteMmio16(int Value, void *Base, unsigned long Offset)
|
|
{
|
|
write_mem_barrier();
|
|
*(CARD16 *) ((unsigned long) Base + (Offset)) = Value;
|
|
}
|
|
|
|
static inline void
|
|
xf86WriteMmio32(int Value, void *Base, unsigned long Offset)
|
|
{
|
|
write_mem_barrier();
|
|
*(CARD32 *) ((unsigned long) Base + (Offset)) = Value;
|
|
}
|
|
|
|
extern _X_EXPORT void xf86SlowBCopyFromBus(unsigned char *, unsigned char *,
|
|
int);
|
|
extern _X_EXPORT void xf86SlowBCopyToBus(unsigned char *, unsigned char *, int);
|
|
|
|
/* Some macros to hide the system dependencies for MMIO accesses */
|
|
/* Changed to kill noise generated by gcc's -Wcast-align */
|
|
#define MMIO_IN8(base, offset) xf86ReadMmio8(base, offset)
|
|
#define MMIO_IN16(base, offset) xf86ReadMmio16(base, offset)
|
|
#define MMIO_IN32(base, offset) xf86ReadMmio32(base, offset)
|
|
|
|
#define MMIO_OUT8(base, offset, val) \
|
|
xf86WriteMmio8((CARD8)(val), base, offset)
|
|
#define MMIO_OUT16(base, offset, val) \
|
|
xf86WriteMmio16((CARD16)(val), base, offset)
|
|
#define MMIO_OUT32(base, offset, val) \
|
|
xf86WriteMmio32((CARD32)(val), base, offset)
|
|
|
|
#elif defined(__powerpc__) || defined(__sparc__)
|
|
/*
|
|
* we provide byteswapping and no byteswapping functions here
|
|
* with byteswapping as default,
|
|
* drivers that don't need byteswapping should define MMIO_IS_BE
|
|
*/
|
|
#define MMIO_IN8(base, offset) xf86ReadMmio8(base, offset)
|
|
#define MMIO_OUT8(base, offset, val) \
|
|
xf86WriteMmio8(base, offset, (CARD8)(val))
|
|
|
|
#if defined(MMIO_IS_BE) /* No byteswapping */
|
|
#define MMIO_IN16(base, offset) xf86ReadMmio16Be(base, offset)
|
|
#define MMIO_IN32(base, offset) xf86ReadMmio32Be(base, offset)
|
|
#define MMIO_OUT16(base, offset, val) \
|
|
xf86WriteMmio16Be(base, offset, (CARD16)(val))
|
|
#define MMIO_OUT32(base, offset, val) \
|
|
xf86WriteMmio32Be(base, offset, (CARD32)(val))
|
|
#else /* byteswapping is the default */
|
|
#define MMIO_IN16(base, offset) xf86ReadMmio16Le(base, offset)
|
|
#define MMIO_IN32(base, offset) xf86ReadMmio32Le(base, offset)
|
|
#define MMIO_OUT16(base, offset, val) \
|
|
xf86WriteMmio16Le(base, offset, (CARD16)(val))
|
|
#define MMIO_OUT32(base, offset, val) \
|
|
xf86WriteMmio32Le(base, offset, (CARD32)(val))
|
|
#endif
|
|
|
|
#elif defined(__nds32__)
|
|
/*
|
|
* we provide byteswapping and no byteswapping functions here
|
|
* with no byteswapping as default; when endianness of CPU core
|
|
* and I/O devices don't match, byte swapping is necessary
|
|
* drivers that need byteswapping should define NDS32_MMIO_SWAP
|
|
*/
|
|
#define MMIO_IN8(base, offset) xf86ReadMmio8(base, offset)
|
|
#define MMIO_OUT8(base, offset, val) \
|
|
xf86WriteMmio8(base, offset, (CARD8)(val))
|
|
|
|
#if defined(NDS32_MMIO_SWAP) /* byteswapping */
|
|
#define MMIO_IN16(base, offset) xf86ReadMmio16Swap(base, offset)
|
|
#define MMIO_IN32(base, offset) xf86ReadMmio32Swap(base, offset)
|
|
#define MMIO_OUT16(base, offset, val) \
|
|
xf86WriteMmio16Swap(base, offset, (CARD16)(val))
|
|
#define MMIO_OUT32(base, offset, val) \
|
|
xf86WriteMmio32Swap(base, offset, (CARD32)(val))
|
|
#else /* no byteswapping is the default */
|
|
#define MMIO_IN16(base, offset) xf86ReadMmio16(base, offset)
|
|
#define MMIO_IN32(base, offset) xf86ReadMmio32(base, offset)
|
|
#define MMIO_OUT16(base, offset, val) \
|
|
xf86WriteMmio16(base, offset, (CARD16)(val))
|
|
#define MMIO_OUT32(base, offset, val) \
|
|
xf86WriteMmio32(base, offset, (CARD32)(val))
|
|
#endif
|
|
|
|
#else /* !__alpha__ && !__powerpc__ && !__sparc__ */
|
|
|
|
#define MMIO_IN8(base, offset) \
|
|
*(volatile CARD8 *)(((CARD8*)(base)) + (offset))
|
|
#define MMIO_IN16(base, offset) \
|
|
*(volatile CARD16 *)(void *)(((CARD8*)(base)) + (offset))
|
|
#define MMIO_IN32(base, offset) \
|
|
*(volatile CARD32 *)(void *)(((CARD8*)(base)) + (offset))
|
|
#define MMIO_OUT8(base, offset, val) \
|
|
*(volatile CARD8 *)(((CARD8*)(base)) + (offset)) = (val)
|
|
#define MMIO_OUT16(base, offset, val) \
|
|
*(volatile CARD16 *)(void *)(((CARD8*)(base)) + (offset)) = (val)
|
|
#define MMIO_OUT32(base, offset, val) \
|
|
*(volatile CARD32 *)(void *)(((CARD8*)(base)) + (offset)) = (val)
|
|
|
|
#endif /* __alpha__ */
|
|
|
|
/*
|
|
* With Intel, the version in os-support/misc/SlowBcopy.s is used.
|
|
* This avoids port I/O during the copy (which causes problems with
|
|
* some hardware).
|
|
*/
|
|
#ifdef __alpha__
|
|
#define slowbcopy_tobus(src,dst,count) xf86SlowBCopyToBus(src,dst,count)
|
|
#define slowbcopy_frombus(src,dst,count) xf86SlowBCopyFromBus(src,dst,count)
|
|
#else /* __alpha__ */
|
|
#define slowbcopy_tobus(src,dst,count) xf86SlowBcopy(src,dst,count)
|
|
#define slowbcopy_frombus(src,dst,count) xf86SlowBcopy(src,dst,count)
|
|
#endif /* __alpha__ */
|
|
|
|
#endif /* _COMPILER_H */
|