416 lines
12 KiB
C
416 lines
12 KiB
C
/*
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* Copyright 1998 by Concurrent Computer Corporation
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*
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* Permission to use, copy, modify, distribute, and sell this software
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* and its documentation for any purpose is hereby granted without fee,
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* provided that the above copyright notice appear in all copies and that
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* both that copyright notice and this permission notice appear in
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* supporting documentation, and that the name of Concurrent Computer
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* Corporation not be used in advertising or publicity pertaining to
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* distribution of the software without specific, written prior
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* permission. Concurrent Computer Corporation makes no representations
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* about the suitability of this software for any purpose. It is
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* provided "as is" without express or implied warranty.
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*
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* CONCURRENT COMPUTER CORPORATION DISCLAIMS ALL WARRANTIES WITH REGARD
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* TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
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* AND FITNESS, IN NO EVENT SHALL CONCURRENT COMPUTER CORPORATION BE
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* LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY
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* DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
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* WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
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* ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
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* SOFTWARE.
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*
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* Copyright 1998 by Metro Link Incorporated
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*
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* Permission to use, copy, modify, distribute, and sell this software
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* and its documentation for any purpose is hereby granted without fee,
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* provided that the above copyright notice appear in all copies and that
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* both that copyright notice and this permission notice appear in
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* supporting documentation, and that the name of Metro Link
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* Incorporated not be used in advertising or publicity pertaining to
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* distribution of the software without specific, written prior
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* permission. Metro Link Incorporated makes no representations
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* about the suitability of this software for any purpose. It is
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* provided "as is" without express or implied warranty.
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*
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* METRO LINK INCORPORATED DISCLAIMS ALL WARRANTIES WITH REGARD
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* TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
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* AND FITNESS, IN NO EVENT SHALL METRO LINK INCORPORATED BE
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* LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY
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* DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
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* WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
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* ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
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* SOFTWARE.
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*/
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#ifdef HAVE_XORG_CONFIG_H
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#include <xorg-config.h>
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#endif
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#include <stdio.h>
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#include "compiler.h"
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#include "xf86.h"
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#include "xf86Priv.h"
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#include "xf86_OSlib.h"
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#include "Pci.h"
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#include <asm/unistd.h>
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#include "../linux/lnx.h" /* for _iobase */
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/*
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* Alpha/Linux platform specific PCI access functions
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*/
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static CARD32 axpPciCfgRead(PCITAG tag, int off);
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static void axpPciCfgWrite(PCITAG, int off, CARD32 val);
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static void axpPciCfgSetBits(PCITAG tag, int off, CARD32 mask, CARD32 bits);
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static pciBusFuncs_t axpFuncs0 = {
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/* pciReadLong */ axpPciCfgRead,
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/* pciWriteLong */ axpPciCfgWrite,
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/* pciSetBitsLong */ axpPciCfgSetBits,
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/* pciAddrHostToBus */ pciAddrNOOP,
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/* pciAddrBusToHost */ pciAddrNOOP
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};
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typedef struct _axpDomainRec {
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int domain, hose;
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int root_bus;
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unsigned long dense_io, sparse_io;
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unsigned long dense_mem, sparse_mem;
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IOADDRESS mapped_io;
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} axpDomainRec, *axpDomainPtr;
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#define MAX_DOMAINS (MAX_PCI_BUSES / 256)
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static axpDomainPtr xf86DomainInfo[MAX_DOMAINS] = { NULL, };
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static int pciNumDomains = 0;
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/*
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* For debug, domain assignment can start downward from a fixed base
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* (instead of up from 0) by defining FORCE_HIGH_DOMAINS. This allows
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* debug of large domain numbers and sparse domain numbering on systems
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* which don't have as many hoses.
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*/
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#if 0
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# define FORCE_HIGH_DOMAINS MAX_DOMAINS /* assign domains downward from here */
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#endif
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/*
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* If FORCE_HIGH_DOMAINS is set, make sure it's not larger than the
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* max domain
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*/
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#if defined(FORCE_HIGH_DOMAINS) && (FORCE_HIGH_DOMAINS > MAX_DOMAINS)
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# undef FORCE_HIGH_DOMAINS
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# define FORCE_HIGH_DOMAINS MAX_DOMAINS
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#endif
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static int
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axpSetupDomains(void)
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{
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axpDomainRec axpDomain;
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int numDomains = 0;
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int hose;
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#ifndef INCLUDE_XF86_NO_DOMAIN
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#ifdef FORCE_HIGH_DOMAINS
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xf86Msg(X_WARNING,
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"DEBUG OPTION FORCE_HIGH_DOMAINS in use - DRI will *NOT* work\n");
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numDomains = FORCE_HIGH_DOMAINS;
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#endif
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/*
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* Since each hose has a different address space, hoses are a perfect
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* overlay for domains, so set up one domain for each hose present
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* in the system. We have to loop through all possible hoses because
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* some systems allow sparse I/O controllers.
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*/
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for(hose = 0; hose < MAX_DOMAINS; hose++) {
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axpDomain.root_bus = _iobase(IOBASE_ROOT_BUS, hose, -1, -1);
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if (axpDomain.root_bus < 0) continue;
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axpDomain.hose = hose;
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#ifndef FORCE_HIGH_DOMAINS
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axpDomain.domain = axpDomain.hose = hose;
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numDomains = axpDomain.domain + 1;
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#else /* FORCE_HIGH_DOMAINS */
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axpDomain.domain = numDomains - hose - 1;
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xf86Msg(X_WARNING,
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"FORCE_HIGH_DOMAINS - assigned hose %d to domain %d\n",
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axpDomain.hose, axpDomain.domain);
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#endif /* FORCE_HIGH_DOMAINS */
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axpDomain.dense_io = _iobase(IOBASE_DENSE_IO, hose, -1, -1);
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axpDomain.sparse_io = _iobase(IOBASE_SPARSE_IO, hose, -1, -1);
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axpDomain.mapped_io = 0;
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axpDomain.dense_mem = _iobase(IOBASE_DENSE_MEM, hose, -1, -1);
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axpDomain.sparse_mem = _iobase(IOBASE_SPARSE_MEM, hose, -1, -1);
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xf86DomainInfo[axpDomain.domain] = xnfalloc(sizeof(axpDomainRec));
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*(xf86DomainInfo[axpDomain.domain]) = axpDomain;
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/*
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* For now, only allow a single domain (hose) on sparse i/o systems.
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*
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* Allowing multiple domains on sparse systems would require:
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* 1) either
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* a) revamping the sparse video mapping code to allow
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* for multiple unrelated address regions
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* -- OR --
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* b) implementing sparse mapping directly in
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* xf86MapDomainMemory
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* 2) revaming read/write sparse routines to correctly handle
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* the solution to 1)
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* 3) implementing a sparse I/O system (mapping, inX/outX)
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* independent of glibc, since the glibc version only
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* supports hose 0
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*/
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if (axpDomain.sparse_io) {
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if (_iobase(IOBASE_ROOT_BUS, hose + 1, -1, -1) >= 0) {
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/*
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* It's a sparse i/o system with (at least) one more hose,
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* show a message indicating that video is constrained to
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* hose 0
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*/
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xf86Msg(X_INFO,
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"Sparse I/O system - constraining video to hose 0\n");
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}
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break;
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}
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}
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#else /* INCLUDE_XF86_NO_DOMAIN */
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/*
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* domain support is not included, so just set up a single domain (0)
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* to represent the first hose so that axpPciInit will still have
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* be able to set up the root bus
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*/
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xf86DomainInfo[0] = xnfalloc(sizeof(axpDomainRec));
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*(xf86DomainInfo[0]) = axpDomain;
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numDomains = 1;
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#endif /* INCLUDE_XF86_NO_DOMAIN */
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return numDomains;
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}
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void
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axpPciInit()
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{
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axpDomainPtr pDomain;
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int domain, bus;
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pciNumDomains = axpSetupDomains();
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for(domain = 0; domain < pciNumDomains; domain++) {
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if (!(pDomain = xf86DomainInfo[domain])) continue;
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/*
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* Since any bridged buses will be behind a probed pci-pci bridge,
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* only set up the root bus for each domain (hose) and the bridged
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* buses will be set up as they are found.
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*/
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/* make a bus with both the domain and the root bus in it */
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bus = PCI_MAKE_BUS(domain, pDomain->root_bus);
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pciBusInfo[bus] = xnfalloc(sizeof(pciBusInfo_t));
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(void)memset(pciBusInfo[bus], 0, sizeof(pciBusInfo_t));
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pciBusInfo[bus]->configMech = PCI_CFG_MECH_OTHER;
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pciBusInfo[bus]->numDevices = 32;
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pciBusInfo[bus]->funcs = &axpFuncs0;
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pciBusInfo[bus]->pciBusPriv = pDomain;
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pciNumBuses = bus + 1;
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}
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}
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/*
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* Alpha/Linux PCI configuration space access routines
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*/
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static int
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axpPciBusFromTag(PCITAG tag)
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{
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pciBusInfo_t *pBusInfo;
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axpDomainPtr pDomain;
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int bus, dfn;
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bus = PCI_BUS_FROM_TAG(tag);
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if ((bus >= pciNumBuses)
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|| !(pBusInfo = pciBusInfo[bus])
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|| !(pDomain = pBusInfo->pciBusPriv)
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|| (pDomain->domain != PCI_DOM_FROM_TAG(tag))) return -1;
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bus = PCI_BUS_NO_DOMAIN(bus); /* should just be root_bus */
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dfn = PCI_DFN_FROM_TAG(tag);
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if (_iobase(IOBASE_HOSE, -1, bus, dfn) != pDomain->hose) return -1;
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return bus;
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}
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static CARD32
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axpPciCfgRead(PCITAG tag, int off)
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{
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int bus, dfn;
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CARD32 val = 0xffffffff;
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if ((bus = axpPciBusFromTag(tag)) >= 0) {
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dfn = PCI_DFN_FROM_TAG(tag);
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syscall(__NR_pciconfig_read, bus, dfn, off, 4, &val);
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}
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return(val);
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}
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static void
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axpPciCfgWrite(PCITAG tag, int off, CARD32 val)
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{
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int bus, dfn;
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if ((bus = axpPciBusFromTag(tag)) >= 0) {
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dfn = PCI_DFN_FROM_TAG(tag);
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syscall(__NR_pciconfig_write, bus, dfn, off, 4, &val);
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}
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}
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static void
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axpPciCfgSetBits(PCITAG tag, int off, CARD32 mask, CARD32 bits)
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{
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int bus, dfn;
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CARD32 val = 0xffffffff;
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if ((bus = axpPciBusFromTag(tag)) >= 0) {
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dfn = PCI_DFN_FROM_TAG(tag);
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syscall(__NR_pciconfig_read, bus, dfn, off, 4, &val);
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val = (val & ~mask) | (bits & mask);
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syscall(__NR_pciconfig_write, bus, dfn, off, 4, &val);
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}
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}
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#ifndef INCLUDE_XF86_NO_DOMAIN
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/*
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* Alpha/Linux addressing domain support
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*/
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_X_EXPORT int
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xf86GetPciDomain(PCITAG Tag)
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{
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return PCI_DOM_FROM_TAG(Tag);
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}
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_X_EXPORT pointer
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xf86MapDomainMemory(int ScreenNum, int Flags, PCITAG Tag,
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ADDRESS Base, unsigned long Size)
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{
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axpDomainPtr pDomain;
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int domain = PCI_DOM_FROM_TAG(Tag);
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if ((domain < 0) || (domain >= pciNumDomains) ||
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!(pDomain = xf86DomainInfo[domain]))
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FatalError("%s called with invalid parameters\n", __FUNCTION__);
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/*
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* xf86MapVidMem already does what we need, but remember to subtract
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* _bus_base() (the physical dense memory root of hose 0) since
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* xf86MapVidMem is expecting an offset relative to _bus_base() rather
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* than an actual physical address.
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*/
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return xf86MapVidMem(ScreenNum, Flags,
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pDomain->dense_mem + Base - _bus_base(), Size);
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}
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IOADDRESS
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xf86MapLegacyIO(struct pci_device *dev)
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{
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axpDomainPtr pDomain;
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const int domain = dev->domain;
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if ((domain < 0) || (domain >= pciNumDomains) ||
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!(pDomain = xf86DomainInfo[domain]))
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FatalError("%s called with invalid parameters\n", __FUNCTION__);
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/*
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* Use glibc inx/outx routines for sparse I/O, so just return the
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* base [this is ok since we also constrain sparse I/O systems to
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* a single domain in axpSetupDomains()]
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*/
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if (pDomain->sparse_io) return 0;
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/*
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* I/O addresses on Alpha are really just different physical memory
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* addresses that the system corelogic turns into I/O commands on the
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* bus, so just use xf86MapVidMem to map I/O as well, but remember
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* to subtract _bus_base() (the physical dense memory root of hose 0)
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* since xf86MapVidMem is expecting an offset relative to _bus_base()
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* rather than an actual physical address.
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*
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* Map the entire I/O space (64kB) at once and only once.
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*/
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if (!pDomain->mapped_io)
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pDomain->mapped_io = (IOADDRESS)xf86MapVidMem(-1, VIDMEM_MMIO,
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pDomain->dense_io - _bus_base(),
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0x10000);
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return pDomain->mapped_io;
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}
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resPtr
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xf86AccResFromOS(resPtr pRes)
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{
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resRange range;
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int domain;
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for(domain = 0; domain < pciNumDomains; domain++) {
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if (!xf86DomainInfo[domain]) continue;
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/*
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* Fallback is to claim the following areas:
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*
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* 0x000c0000 - 0x000effff location of VGA and other extensions ROMS
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*/
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RANGE(range, 0x000c0000, 0x000effff,
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RANGE_TYPE(ResExcMemBlock, domain));
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pRes = xf86AddResToList(pRes, &range, -1);
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/*
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* Fallback would be to claim well known ports in the 0x0 - 0x3ff
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* range along with their sparse I/O aliases, but that's too
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* imprecise. Instead claim a bare minimum here.
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*/
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RANGE(range, 0x00000000, 0x000000ff,
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RANGE_TYPE(ResExcIoBlock, domain)); /* For mainboard */
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pRes = xf86AddResToList(pRes, &range, -1);
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/*
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* At minimum, the top and bottom resources must be claimed, so that
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* resources that are (or appear to be) unallocated can be relocated.
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*/
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RANGE(range, 0x00000000, 0x00000000,
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RANGE_TYPE(ResExcMemBlock, domain));
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pRes = xf86AddResToList(pRes, &range, -1);
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RANGE(range, 0xffffffff, 0xffffffff,
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RANGE_TYPE(ResExcMemBlock, domain));
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pRes = xf86AddResToList(pRes, &range, -1);
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/* RANGE(range, 0x00000000, 0x00000000,
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RANGE_TYPE(ResExcIoBlock, domain));
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pRes = xf86AddResToList(pRes, &range, -1); */
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RANGE(range, 0xffffffff, 0xffffffff,
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RANGE_TYPE(ResExcIoBlock, domain));
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pRes = xf86AddResToList(pRes, &range, -1);
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}
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return pRes;
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}
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#endif /* !INCLUDE_XF86_NO_DOMAIN */
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