607 lines
17 KiB
C
607 lines
17 KiB
C
/*
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* Copyright 1998 by Concurrent Computer Corporation
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*
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* Permission to use, copy, modify, distribute, and sell this software
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* and its documentation for any purpose is hereby granted without fee,
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* provided that the above copyright notice appear in all copies and that
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* both that copyright notice and this permission notice appear in
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* supporting documentation, and that the name of Concurrent Computer
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* Corporation not be used in advertising or publicity pertaining to
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* distribution of the software without specific, written prior
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* permission. Concurrent Computer Corporation makes no representations
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* about the suitability of this software for any purpose. It is
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* provided "as is" without express or implied warranty.
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*
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* CONCURRENT COMPUTER CORPORATION DISCLAIMS ALL WARRANTIES WITH REGARD
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* TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
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* AND FITNESS, IN NO EVENT SHALL CONCURRENT COMPUTER CORPORATION BE
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* LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY
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* DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
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* WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
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* ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
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* SOFTWARE.
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*
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* Copyright 1998 by Metro Link Incorporated
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*
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* Permission to use, copy, modify, distribute, and sell this software
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* and its documentation for any purpose is hereby granted without fee,
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* provided that the above copyright notice appear in all copies and that
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* both that copyright notice and this permission notice appear in
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* supporting documentation, and that the name of Metro Link
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* Incorporated not be used in advertising or publicity pertaining to
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* distribution of the software without specific, written prior
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* permission. Metro Link Incorporated makes no representations
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* about the suitability of this software for any purpose. It is
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* provided "as is" without express or implied warranty.
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*
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* METRO LINK INCORPORATED DISCLAIMS ALL WARRANTIES WITH REGARD
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* TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
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* AND FITNESS, IN NO EVENT SHALL METRO LINK INCORPORATED BE
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* LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY
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* DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
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* WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
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* ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
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* SOFTWARE.
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*/
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#ifdef HAVE_XORG_CONFIG_H
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#include <xorg-config.h>
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#endif
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#include <stdio.h>
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#include "compiler.h"
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#include "xf86.h"
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#include "xf86Priv.h"
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#include "xf86_OSlib.h"
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#include "Pci.h"
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#include <dirent.h>
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/*
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* linux platform specific PCI access functions -- using /proc/bus/pci
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* needs kernel version 2.2.x
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*/
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static ADDRESS linuxTransAddrBusToHost(PCITAG tag, PciAddrType type, ADDRESS addr);
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#if defined(__powerpc__)
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static ADDRESS linuxPpcBusAddrToHostAddr(PCITAG, PciAddrType, ADDRESS);
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#endif
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static pciBusFuncs_t linuxFuncs0 = {
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#if defined(__powerpc__)
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/* pciAddrBusToHost */ linuxPpcBusAddrToHostAddr,
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#else
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/* linuxTransAddrBusToHost is busted on sparc64 but the PCI rework tree
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* makes it all moot, so we kludge it for now */
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#if defined(__sparc__)
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/* pciAddrBusToHost */ pciAddrNOOP,
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#else
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/* pciAddrBusToHost */ linuxTransAddrBusToHost,
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#endif /* __sparc64__ */
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#endif
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};
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static pciBusInfo_t linuxPci0 = {
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/* configMech */ PCI_CFG_MECH_OTHER,
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/* numDevices */ 32,
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/* secondary */ FALSE,
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/* primary_bus */ 0,
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/* funcs */ &linuxFuncs0,
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/* pciBusPriv */ NULL,
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/* bridge */ NULL
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};
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static const struct pci_id_match match_host_bridge = {
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PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY,
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(PCI_CLASS_BRIDGE << 16) | (PCI_SUBCLASS_BRIDGE_HOST << 8),
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0x0000ffff00, 0
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};
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#ifndef INCLUDE_XF86_NO_DOMAIN
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#define MAX_DOMAINS 257
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static pointer DomainMmappedIO[MAX_DOMAINS];
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#endif
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void
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linuxPciInit(void)
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{
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struct stat st;
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#ifndef INCLUDE_XF86_NO_DOMAIN
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(void) memset(DomainMmappedIO, 0, sizeof(DomainMmappedIO));
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#endif
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if ((xf86Info.pciFlags == PCIForceNone) ||
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(-1 == stat("/proc/bus/pci", &st))) {
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/* when using this as default for all linux architectures,
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we'll need a fallback for 2.0 kernels here */
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return;
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}
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pciNumBuses = 1;
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pciBusInfo[0] = &linuxPci0;
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}
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/**
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* \bug
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* The generation of the procfs file name for the domain != 0 case may not be
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* correct.
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*/
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static int
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linuxPciOpenFile(struct pci_device *dev, Bool write)
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{
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static struct pci_device *last_dev = NULL;
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static int fd = -1,is_write = 0;
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char file[64];
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struct stat ignored;
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static int is26 = -1;
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if (dev == NULL) {
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return -1;
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}
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if (is26 == -1) {
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is26 = (stat("/sys/bus/pci", &ignored) < 0) ? 0 : 1;
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}
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if (fd == -1 || (write && (!is_write)) || (last_dev != dev)) {
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if (fd != -1) {
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close(fd);
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fd = -1;
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}
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if (is26) {
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sprintf(file,"/sys/bus/pci/devices/%04u:%02x:%02x.%01x/config",
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dev->domain, dev->bus, dev->dev, dev->func);
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} else {
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if (dev->domain == 0) {
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sprintf(file,"/proc/bus/pci/%02x", dev->bus);
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if (stat(file, &ignored) < 0) {
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sprintf(file, "/proc/bus/pci/0000:%02x/%02x.%1x",
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dev->bus, dev->dev, dev->func);
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} else {
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sprintf(file, "/proc/bus/pci/%02x/%02x.%1x",
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dev->bus, dev->dev, dev->func);
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}
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} else {
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sprintf(file,"/proc/bus/pci/%02x%02x", dev->domain, dev->bus);
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if (stat(file, &ignored) < 0) {
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sprintf(file, "/proc/bus/pci/%04x:%04x/%02x.%1x",
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dev->domain, dev->bus, dev->dev, dev->func);
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} else {
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sprintf(file, "/proc/bus/pci/%02x%02x/%02x.%1x",
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dev->domain, dev->bus, dev->dev, dev->func);
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}
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}
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}
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if (write) {
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fd = open(file,O_RDWR);
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if (fd != -1) is_write = TRUE;
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} else {
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switch (is_write) {
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case TRUE:
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fd = open(file,O_RDWR);
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if (fd > -1)
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break;
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default:
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fd = open(file,O_RDONLY);
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is_write = FALSE;
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}
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}
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last_dev = dev;
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}
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return fd;
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}
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/*
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* This function will convert a BAR address into a host address
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* suitable for passing into the mmap function of a /proc/bus
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* device.
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*/
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ADDRESS linuxTransAddrBusToHost(PCITAG tag, PciAddrType type, ADDRESS addr)
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{
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ADDRESS ret = xf86GetOSOffsetFromPCI(tag, PCI_MEM|PCI_IO, addr);
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if (ret)
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return ret;
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/*
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* if it is not a BAR address, it must be legacy, (or wrong)
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* return it as is..
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*/
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return addr;
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}
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#if defined(__powerpc__)
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#ifndef __NR_pciconfig_iobase
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#define __NR_pciconfig_iobase 200
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#endif
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static ADDRESS
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linuxPpcBusAddrToHostAddr(PCITAG tag, PciAddrType type, ADDRESS addr)
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{
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if (type == PCI_MEM)
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{
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ADDRESS membase = syscall(__NR_pciconfig_iobase, 1,
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PCI_BUS_FROM_TAG(tag), PCI_DFN_FROM_TAG(tag));
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return (addr + membase);
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}
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else if (type == PCI_IO)
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{
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ADDRESS iobase = syscall(__NR_pciconfig_iobase, 2,
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PCI_BUS_FROM_TAG(tag), PCI_DFN_FROM_TAG(tag));
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return (addr + iobase);
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}
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else return addr;
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}
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#endif /* __powerpc__ */
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#ifndef INCLUDE_XF86_NO_DOMAIN
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/*
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* Compiling the following simply requires the presence of <linux/pci.c>.
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* Actually running this is another matter altogether...
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*
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* This scheme requires that the kernel allow mmap()'ing of a host bridge's I/O
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* and memory spaces through its /proc/bus/pci/BUS/DFN entry. Which one is
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* determined by a prior ioctl().
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*
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* For the sparc64 port, this means 2.4.12 or later. For ppc, this
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* functionality is almost, but not quite there yet. Alpha and other kernel
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* ports to multi-domain architectures still need to implement this.
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*
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* This scheme is also predicated on the use of an IOADDRESS compatible type to
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* designate I/O addresses. Although IOADDRESS is defined as an unsigned
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* integral type, it is actually the virtual address of, i.e. a pointer to, the
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* I/O port to access. And so, the inX/outX macros in "compiler.h" need to be
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* #define'd appropriately (as is done on SPARC's).
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*
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* Another requirement to port this scheme to another multi-domain architecture
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* is to add the appropriate entries in the pciControllerSizes array below.
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*
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* TO DO: Address the deleterious reaction some host bridges have to master
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* aborts. This is already done for secondary PCI buses, but not yet
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* for accesses to primary buses (except for the SPARC port, where
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* master aborts are avoided during PCI scans).
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*/
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#include <linux/pci.h>
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#ifndef PCIIOC_BASE /* Ioctls for /proc/bus/pci/X/Y nodes. */
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#define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
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/* Get controller for PCI device. */
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#define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00)
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/* Set mmap state to I/O space. */
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#define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01)
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/* Set mmap state to MEM space. */
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#define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02)
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/* Enable/disable write-combining. */
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#define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03)
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#endif
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/* This probably shouldn't be Linux-specific */
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static struct pci_device *
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get_parent_bridge(struct pci_device *dev)
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{
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struct pci_id_match bridge_match = {
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PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY,
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(PCI_CLASS_BRIDGE << 16) | (PCI_SUBCLASS_BRIDGE_PCI << 8),
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0
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};
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struct pci_device *bridge;
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struct pci_device_iterator *iter;
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if (dev == NULL) {
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return NULL;
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}
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iter = pci_id_match_iterator_create(& bridge_match);
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if (iter == NULL) {
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return NULL;
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}
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while ((bridge = pci_device_next(iter)) != NULL) {
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if (bridge->domain == dev->domain) {
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const struct pci_bridge_info *info =
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pci_device_get_bridge_info(bridge);
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if (info != NULL) {
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if (info->secondary_bus == dev->bus) {
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break;
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}
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}
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}
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}
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pci_iterator_destroy(iter);
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return bridge;
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}
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/*
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* This is ugly, but until I can extract this information from the kernel,
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* it'll have to do. The default I/O space size is 64K, and 4G for memory.
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* Anything else needs to go in this table. (PowerPC folk take note.)
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*
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* Note that Linux/SPARC userland is 32-bit, so 4G overflows to zero here.
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*
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* Please keep this table in ascending vendor/device order.
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*/
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static const struct pciSizes {
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unsigned short vendor, device;
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unsigned long io_size, mem_size;
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} pciControllerSizes[] = {
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{
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PCI_VENDOR_SUN, PCI_CHIP_PSYCHO,
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1U << 16, 1U << 31
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},
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{
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PCI_VENDOR_SUN, PCI_CHIP_SCHIZO,
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1U << 24, 1U << 31 /* ??? */
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},
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{
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PCI_VENDOR_SUN, PCI_CHIP_SABRE,
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1U << 24, (unsigned long)(1ULL << 32)
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},
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{
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PCI_VENDOR_SUN, PCI_CHIP_HUMMINGBIRD,
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1U << 24, (unsigned long)(1ULL << 32)
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}
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};
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#define NUM_SIZES (sizeof(pciControllerSizes) / sizeof(pciControllerSizes[0]))
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static const struct pciSizes *
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linuxGetSizesStruct(const struct pci_device *dev)
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{
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static const struct pciSizes default_size = {
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0, 0, 1U << 16, (unsigned long)(1ULL << 32)
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};
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int i;
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/* Look up vendor/device */
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if (dev != NULL) {
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for (i = 0; i < NUM_SIZES; i++) {
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if ((dev->vendor_id == pciControllerSizes[i].vendor)
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&& (dev->device_id == pciControllerSizes[i].device)) {
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return & pciControllerSizes[i];
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}
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}
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}
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/* Default to 64KB I/O and 4GB memory. */
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return & default_size;
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}
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static __inline__ unsigned long
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linuxGetIOSize(const struct pci_device *dev)
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{
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const struct pciSizes * const sizes = linuxGetSizesStruct(dev);
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return sizes->io_size;
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}
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static pointer
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linuxMapPci(int ScreenNum, int Flags, struct pci_device *dev,
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ADDRESS Base, unsigned long Size, int mmap_ioctl)
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{
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/* Align to page boundary */
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const ADDRESS realBase = Base & ~(getpagesize() - 1);
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const ADDRESS Offset = Base - realBase;
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do {
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unsigned char *result;
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int fd, mmapflags, prot;
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xf86InitVidMem();
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/* If dev is NULL, linuxPciOpenFile will return -1, and this routine
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* will fail gracefully.
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*/
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prot = ((Flags & VIDMEM_READONLY) == 0);
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if (((fd = linuxPciOpenFile(dev, prot)) < 0) ||
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(ioctl(fd, mmap_ioctl, 0) < 0))
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break;
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/* Note: IA-64 doesn't compile this and doesn't need to */
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#ifdef __ia64__
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# ifndef MAP_WRITECOMBINED
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# define MAP_WRITECOMBINED 0x00010000
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# endif
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# ifndef MAP_NONCACHED
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# define MAP_NONCACHED 0x00020000
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# endif
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if (Flags & VIDMEM_FRAMEBUFFER)
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mmapflags = MAP_SHARED | MAP_WRITECOMBINED;
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else
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mmapflags = MAP_SHARED | MAP_NONCACHED;
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#else /* !__ia64__ */
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mmapflags = (Flags & VIDMEM_FRAMEBUFFER) / VIDMEM_FRAMEBUFFER;
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if (ioctl(fd, PCIIOC_WRITE_COMBINE, mmapflags) < 0)
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break;
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mmapflags = MAP_SHARED;
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#endif /* ?__ia64__ */
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if (Flags & VIDMEM_READONLY)
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prot = PROT_READ;
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else
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prot = PROT_READ | PROT_WRITE;
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result = mmap(NULL, Size + Offset, prot, mmapflags, fd, realBase);
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if (!result || ((pointer)result == MAP_FAILED))
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return NULL;
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xf86MakeNewMapping(ScreenNum, Flags, realBase, Size + Offset, result);
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return result + Offset;
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} while (0);
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if (mmap_ioctl == PCIIOC_MMAP_IS_MEM)
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return xf86MapVidMem(ScreenNum, Flags, Base, Size);
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return NULL;
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}
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static int
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linuxOpenLegacy(struct pci_device *dev, char *name)
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{
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static const char PREFIX[] = "/sys/class/pci_bus/%04x:%02x/%s";
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char path[sizeof(PREFIX) + 10];
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int fd = -1;
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while (dev != NULL) {
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snprintf(path, sizeof(path) - 1, PREFIX, dev->domain, dev->bus, name);
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fd = open(path, O_RDWR);
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if (fd >= 0) {
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return fd;
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}
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dev = get_parent_bridge(dev);
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}
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return fd;
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}
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/*
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* xf86MapDomainMemory - memory map PCI domain memory
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*
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* This routine maps the memory region in the domain specified by Tag and
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* returns a pointer to it. The pointer is saved for future use if it's in
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* the legacy ISA memory space (memory in a domain between 0 and 1MB).
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*/
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_X_EXPORT pointer
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xf86MapDomainMemory(int ScreenNum, int Flags, struct pci_device *dev,
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ADDRESS Base, unsigned long Size)
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{
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int fd = -1;
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pointer addr;
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/*
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* We use /proc/bus/pci on non-legacy addresses or if the Linux sysfs
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* legacy_mem interface is unavailable.
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*/
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if ((Base > 1024*1024) || ((fd = linuxOpenLegacy(dev, "legacy_mem")) < 0))
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return linuxMapPci(ScreenNum, Flags, dev, Base, Size,
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PCIIOC_MMAP_IS_MEM);
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else
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addr = mmap(NULL, Size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, Base);
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if (fd >= 0)
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close(fd);
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if (addr == NULL || addr == MAP_FAILED) {
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perror("mmap failure");
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FatalError("xf86MapDomainMem(): mmap() failure\n");
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}
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return addr;
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}
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/**
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* Map I/O space in this domain
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*
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* Each domain has a legacy ISA I/O space. This routine will try to
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* map it using the Linux sysfs legacy_io interface. If that fails,
|
|
* it'll fall back to using /proc/bus/pci.
|
|
*
|
|
* If the legacy_io interface \b does exist, the file descriptor (\c fd below)
|
|
* will be saved in the \c DomainMmappedIO array in the upper bits of the
|
|
* pointer. Callers will do I/O with small port numbers (<64k values), so
|
|
* the platform I/O code can extract the port number and the \c fd, \c lseek
|
|
* to the port number in the legacy_io file, and issue the read or write.
|
|
*
|
|
* This has no means of returning failure, so all errors are fatal
|
|
*/
|
|
IOADDRESS
|
|
xf86MapLegacyIO(struct pci_device *dev)
|
|
{
|
|
const int domain = dev->domain;
|
|
struct pci_device *bridge = get_parent_bridge(dev);
|
|
int fd;
|
|
|
|
if (domain >= MAX_DOMAINS)
|
|
FatalError("xf86MapLegacyIO(): domain out of range\n");
|
|
|
|
if (DomainMmappedIO[domain] == NULL) {
|
|
/* Permanently map all of I/O space */
|
|
fd = linuxOpenLegacy(bridge, "legacy_io");
|
|
if (fd < 0) {
|
|
DomainMmappedIO[domain] = linuxMapPci(-1, VIDMEM_MMIO, bridge,
|
|
0, linuxGetIOSize(bridge),
|
|
PCIIOC_MMAP_IS_IO);
|
|
}
|
|
else { /* legacy_io file exists, encode fd */
|
|
DomainMmappedIO[domain] = (pointer)(fd << 24);
|
|
}
|
|
}
|
|
|
|
return (IOADDRESS)DomainMmappedIO[domain];
|
|
}
|
|
|
|
resPtr
|
|
xf86AccResFromOS(resPtr pRes)
|
|
{
|
|
struct pci_device *dev;
|
|
struct pci_device_iterator *iter;
|
|
resRange range;
|
|
|
|
iter = pci_id_match_iterator_create(& match_host_bridge);
|
|
while ((dev = pci_device_next(iter)) != NULL) {
|
|
const int domain = dev->domain;
|
|
const struct pciSizes * const sizes = linuxGetSizesStruct(dev);
|
|
|
|
/*
|
|
* At minimum, the top and bottom resources must be claimed, so
|
|
* that resources that are (or appear to be) unallocated can be
|
|
* relocated.
|
|
*/
|
|
RANGE(range, 0x00000000u, 0x0009ffffu,
|
|
RANGE_TYPE(ResExcMemBlock, domain));
|
|
pRes = xf86AddResToList(pRes, &range, -1);
|
|
RANGE(range, 0x000c0000u, 0x000effffu,
|
|
RANGE_TYPE(ResExcMemBlock, domain));
|
|
pRes = xf86AddResToList(pRes, &range, -1);
|
|
RANGE(range, 0x000f0000u, 0x000fffffu,
|
|
RANGE_TYPE(ResExcMemBlock, domain));
|
|
pRes = xf86AddResToList(pRes, &range, -1);
|
|
|
|
RANGE(range, (ADDRESS)(sizes->mem_size - 1),
|
|
(ADDRESS)(sizes->mem_size - 1),
|
|
RANGE_TYPE(ResExcMemBlock, domain));
|
|
pRes = xf86AddResToList(pRes, &range, -1);
|
|
|
|
RANGE(range, 0x00000000u, 0x00000000u,
|
|
RANGE_TYPE(ResExcIoBlock, domain));
|
|
pRes = xf86AddResToList(pRes, &range, -1);
|
|
RANGE(range, (IOADDRESS)(sizes->io_size - 1),
|
|
(IOADDRESS)(sizes->io_size - 1),
|
|
RANGE_TYPE(ResExcIoBlock, domain));
|
|
pRes = xf86AddResToList(pRes, &range, -1);
|
|
|
|
/* FIXME: The old code reserved domain 0 for a special purpose. The
|
|
* FIXME: new code just uses whatever domains the kernel tells it,
|
|
* FIXME: but there is no way to get a domain < 0. What should
|
|
* FIXME: happen here?
|
|
*
|
|
if (domain <= 0)
|
|
break;
|
|
*/
|
|
}
|
|
|
|
pci_iterator_destroy(iter);
|
|
|
|
return pRes;
|
|
}
|
|
|
|
#endif /* !INCLUDE_XF86_NO_DOMAIN */
|